pub trait Instruction:
Display
+ Debug
+ Copy
+ Send
+ Sync
+ Sized
+ 'static {
type Reg: Register;
const IMPLEMENTED_EXTENSIONS: &'static [TypeId];
// Required methods
fn try_decode(instruction: u32) -> Option<Self>;
fn alignment() -> u8;
fn size(&self) -> u8;
// Provided method
fn implements_extension<E>() -> bool
where E: Instruction<Reg = Self::Reg> { ... }
}Expand description
Generic instruction
Required Associated Constants§
Sourceconst IMPLEMENTED_EXTENSIONS: &'static [TypeId]
const IMPLEMENTED_EXTENSIONS: &'static [TypeId]
Types of all fully implemented extensions.
Note that this constant is auto-generated by the macro and usually doesn’t need to be specified explicitly (and if done, will cause conflicts at compile time).
Required Associated Types§
Required Methods§
Sourcefn try_decode(instruction: u32) -> Option<Self>
fn try_decode(instruction: u32) -> Option<Self>
Try to decode a single valid instruction
Provided Methods§
Sourcefn implements_extension<E>() -> boolwhere
E: Instruction<Reg = Self::Reg>,
fn implements_extension<E>() -> boolwhere
E: Instruction<Reg = Self::Reg>,
Checks whether this instruction implements the given extension
Dyn Compatibility§
This trait is not dyn compatible.
In older versions of Rust, dyn compatibility was called "object safety".
Implementors§
§impl<Reg> Instruction for Rv32AInstruction<Reg>
impl<Reg> Instruction for Rv32AInstruction<Reg>
const IMPLEMENTED_EXTENSIONS: &'static [TypeId]
type Reg = Reg
§impl<Reg> Instruction for Rv32BInstruction<Reg>
impl<Reg> Instruction for Rv32BInstruction<Reg>
const IMPLEMENTED_EXTENSIONS: &'static [TypeId]
type Reg = Reg
§impl<Reg> Instruction for Rv32Instruction<Reg>
impl<Reg> Instruction for Rv32Instruction<Reg>
const IMPLEMENTED_EXTENSIONS: &'static [TypeId]
type Reg = Reg
§impl<Reg> Instruction for Rv32MInstruction<Reg>
impl<Reg> Instruction for Rv32MInstruction<Reg>
const IMPLEMENTED_EXTENSIONS: &'static [TypeId]
type Reg = Reg
§impl<Reg> Instruction for Rv32ZaamoInstruction<Reg>
impl<Reg> Instruction for Rv32ZaamoInstruction<Reg>
const IMPLEMENTED_EXTENSIONS: &'static [TypeId]
type Reg = Reg
§impl<Reg> Instruction for Rv32ZabhaInstruction<Reg>
impl<Reg> Instruction for Rv32ZabhaInstruction<Reg>
const IMPLEMENTED_EXTENSIONS: &'static [TypeId]
type Reg = Reg
§impl<Reg> Instruction for Rv32ZacasInstruction<Reg>
impl<Reg> Instruction for Rv32ZacasInstruction<Reg>
const IMPLEMENTED_EXTENSIONS: &'static [TypeId]
type Reg = Reg
§impl<Reg> Instruction for Rv32ZalasrInstruction<Reg>
impl<Reg> Instruction for Rv32ZalasrInstruction<Reg>
const IMPLEMENTED_EXTENSIONS: &'static [TypeId]
type Reg = Reg
§impl<Reg> Instruction for Rv32ZalrscInstruction<Reg>
impl<Reg> Instruction for Rv32ZalrscInstruction<Reg>
const IMPLEMENTED_EXTENSIONS: &'static [TypeId]
type Reg = Reg
§impl<Reg> Instruction for Rv32ZbaInstruction<Reg>
impl<Reg> Instruction for Rv32ZbaInstruction<Reg>
const IMPLEMENTED_EXTENSIONS: &'static [TypeId]
type Reg = Reg
§impl<Reg> Instruction for Rv32ZbbInstruction<Reg>
impl<Reg> Instruction for Rv32ZbbInstruction<Reg>
const IMPLEMENTED_EXTENSIONS: &'static [TypeId]
type Reg = Reg
§impl<Reg> Instruction for Rv32ZbcInstruction<Reg>
impl<Reg> Instruction for Rv32ZbcInstruction<Reg>
const IMPLEMENTED_EXTENSIONS: &'static [TypeId]
type Reg = Reg
§impl<Reg> Instruction for Rv32ZbkbInstruction<Reg>
impl<Reg> Instruction for Rv32ZbkbInstruction<Reg>
const IMPLEMENTED_EXTENSIONS: &'static [TypeId]
type Reg = Reg
§impl<Reg> Instruction for Rv32ZbkcInstruction<Reg>
impl<Reg> Instruction for Rv32ZbkcInstruction<Reg>
const IMPLEMENTED_EXTENSIONS: &'static [TypeId]
type Reg = Reg
§impl<Reg> Instruction for Rv32ZbkxInstruction<Reg>
impl<Reg> Instruction for Rv32ZbkxInstruction<Reg>
const IMPLEMENTED_EXTENSIONS: &'static [TypeId]
type Reg = Reg
§impl<Reg> Instruction for Rv32ZbsInstruction<Reg>
impl<Reg> Instruction for Rv32ZbsInstruction<Reg>
const IMPLEMENTED_EXTENSIONS: &'static [TypeId]
type Reg = Reg
§impl<Reg> Instruction for Rv32ZcaInstruction<Reg>
impl<Reg> Instruction for Rv32ZcaInstruction<Reg>
const IMPLEMENTED_EXTENSIONS: &'static [TypeId]
type Reg = Reg
§impl<Reg> Instruction for Rv32ZcbInstruction<Reg>
impl<Reg> Instruction for Rv32ZcbInstruction<Reg>
const IMPLEMENTED_EXTENSIONS: &'static [TypeId]
type Reg = Reg
§impl<Reg> Instruction for Rv32ZcmpInstruction<Reg>
impl<Reg> Instruction for Rv32ZcmpInstruction<Reg>
const IMPLEMENTED_EXTENSIONS: &'static [TypeId]
type Reg = Reg
§impl<Reg> Instruction for Rv32ZknInstruction<Reg>
impl<Reg> Instruction for Rv32ZknInstruction<Reg>
const IMPLEMENTED_EXTENSIONS: &'static [TypeId]
type Reg = Reg
§impl<Reg> Instruction for Rv32ZkndInstruction<Reg>
Encoding layout (R-type, opcode 0x33, funct3 0x0):
impl<Reg> Instruction for Rv32ZkndInstruction<Reg>
Encoding layout (R-type, opcode 0x33, funct3 0x0):
[31:30] bs - 2-bit byte select
[29:25] funct5 - 0b1_0101 (aes32dsi) / 0b1_0111 (aes32dsmi)
[24:20] rs2
[19:15] rs1
[14:12] funct3 - 0b000
[11:7] rd
[6:0] opcode - 0b011_0011 (OP)Ratified match/mask values (from riscv-opcodes): MATCH_AES32DSI = 0x2a00_0033, MASK_AES32DSI = 0x3e00_707f MATCH_AES32DSMI = 0x2e00_0033, MASK_AES32DSMI = 0x3e00_707f
rd and rs1 are independent fields. The assembler convention places
the accumulator in both rd and rs1 (the rt pattern), but the hardware
does not require rd == rs1 and the decoder must not enforce it.
const IMPLEMENTED_EXTENSIONS: &'static [TypeId]
type Reg = Reg
§impl<Reg> Instruction for Rv32ZkneInstruction<Reg>
Encoding layout (R-type, opcode 0x33, funct3 0x0):
impl<Reg> Instruction for Rv32ZkneInstruction<Reg>
Encoding layout (R-type, opcode 0x33, funct3 0x0):
[31:30] bs - 2-bit byte select
[29:25] funct5 - 0b1_0001 (aes32esi) / 0b1_0011 (aes32esmi)
[24:20] rs2
[19:15] rs1
[14:12] funct3 - 0b000
[11:7] rd
[6:0] opcode - 0b011_0011 (OP)Ratified match/mask values (from riscv-opcodes): MATCH_AES32ESI = 0x2200_0033, MASK_AES32ESI = 0x3e00_707f MATCH_AES32ESMI = 0x2600_0033, MASK_AES32ESMI = 0x3e00_707f
rd and rs1 are independent fields. The assembler convention places
the accumulator in both rd and rs1 (the rt pattern), but the hardware
does not require rd == rs1 and the decoder must not enforce it.