#[repr(u16)]pub enum MCsr {
Show 13 variants
Mvendorid = 3_857,
Marchid = 3_858,
Mimpid = 3_859,
Mhartid = 3_860,
Mstatus = 768,
Misa = 769,
Mie = 772,
Mtvec = 773,
Mscratch = 832,
Mepc = 833,
Mcause = 834,
Mtval = 835,
Mip = 836,
}Expand description
Machine CSR addresses (core mandatory registers from the Privileged Spec)
Variants§
Mvendorid = 3_857
Machine vendor ID register (MRO)
Marchid = 3_858
Machine architecture ID register (MRO)
Mimpid = 3_859
Machine implementation ID register (MRO)
Mhartid = 3_860
Hart ID register (MRO)
Mstatus = 768
Machine status register (MRW)
Misa = 769
Machine ISA and extensions register (MRW)
Mie = 772
Machine interrupt-enable register (MRW)
Mtvec = 773
Machine trap-vector base address register (MRW)
Mscratch = 832
Machine scratch register (MRW)
Mepc = 833
Machine exception program counter (MRW)
Mcause = 834
Machine trap cause (MRW)
Mtval = 835
Machine trap value (MRW)
Mip = 836
Machine interrupt pending (MRW)
Implementations§
Trait Implementations§
impl Copy for MCsr
impl Eq for MCsr
impl StructuralPartialEq for MCsr
Auto Trait Implementations§
impl Freeze for MCsr
impl RefUnwindSafe for MCsr
impl Send for MCsr
impl Sync for MCsr
impl Unpin for MCsr
impl UnsafeUnpin for MCsr
impl UnwindSafe for MCsr
Blanket Implementations§
Source§impl<T> BorrowMut<T> for Twhere
T: ?Sized,
impl<T> BorrowMut<T> for Twhere
T: ?Sized,
Source§fn borrow_mut(&mut self) -> &mut T
fn borrow_mut(&mut self) -> &mut T
Mutably borrows from an owned value. Read more