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Rv64AInstruction

ab_riscv_primitives::instructions::rv64::a

Enum Rv64AInstruction

pub enum Rv64AInstruction<Reg> {
Show 22 variants    Amoswap {
        rs1: Reg,
        rs2: Reg,
        rd: Reg,
        aq: bool,
        rl: bool,
    },
    Amoadd {
        rs1: Reg,
        rs2: Reg,
        rd: Reg,
        aq: bool,
        rl: bool,
    },
    Amoxor {
        rs1: Reg,
        rs2: Reg,
        rd: Reg,
        aq: bool,
        rl: bool,
    },
    Amoand {
        rs1: Reg,
        rs2: Reg,
        rd: Reg,
        aq: bool,
        rl: bool,
    },
    Amoor {
        rs1: Reg,
        rs2: Reg,
        rd: Reg,
        aq: bool,
        rl: bool,
    },
    Amomin {
        rs1: Reg,
        rs2: Reg,
        rd: Reg,
        aq: bool,
        rl: bool,
    },
    Amomax {
        rs1: Reg,
        rs2: Reg,
        rd: Reg,
        aq: bool,
        rl: bool,
    },
    Amominu {
        rs1: Reg,
        rs2: Reg,
        rd: Reg,
        aq: bool,
        rl: bool,
    },
    Amomaxu {
        rs1: Reg,
        rs2: Reg,
        rd: Reg,
        aq: bool,
        rl: bool,
    },
    AmoswapD {
        rs1: Reg,
        rs2: Reg,
        rd: Reg,
        aq: bool,
        rl: bool,
    },
    AmoaddD {
        rs1: Reg,
        rs2: Reg,
        rd: Reg,
        aq: bool,
        rl: bool,
    },
    AmoxorD {
        rs1: Reg,
        rs2: Reg,
        rd: Reg,
        aq: bool,
        rl: bool,
    },
    AmoandD {
        rs1: Reg,
        rs2: Reg,
        rd: Reg,
        aq: bool,
        rl: bool,
    },
    AmoorD {
        rs1: Reg,
        rs2: Reg,
        rd: Reg,
        aq: bool,
        rl: bool,
    },
    AmominD {
        rs1: Reg,
        rs2: Reg,
        rd: Reg,
        aq: bool,
        rl: bool,
    },
    AmomaxD {
        rs1: Reg,
        rs2: Reg,
        rd: Reg,
        aq: bool,
        rl: bool,
    },
    AmominuD {
        rs1: Reg,
        rs2: Reg,
        rd: Reg,
        aq: bool,
        rl: bool,
    },
    AmomaxuD {
        rs1: Reg,
        rs2: Reg,
        rd: Reg,
        aq: bool,
        rl: bool,
    },
    Lr {
        rs1: Reg,
        rd: Reg,
        aq: bool,
        rl: bool,
        /* private fields */
    },
    Sc {
        rs1: Reg,
        rs2: Reg,
        rd: Reg,
        aq: bool,
        rl: bool,
    },
    LrD {
        rs1: Reg,
        rd: Reg,
        aq: bool,
        rl: bool,
        /* private fields */
    },
    ScD {
        rs1: Reg,
        rs2: Reg,
        rd: Reg,
        aq: bool,
        rl: bool,
    },
}

Expand description

RISC-V RV64 A (Zaamo + Zalrsc) instruction

Variants§

Amoswap

Fields

§rs1: Reg

§rs2: Reg

§rd: Reg

§aq: bool

§rl: bool

Amoadd

Fields

§rs1: Reg

§rs2: Reg

§rd: Reg

§aq: bool

§rl: bool

Amoxor

Fields

§rs1: Reg

§rs2: Reg

§rd: Reg

§aq: bool

§rl: bool

Amoand

Fields

§rs1: Reg

§rs2: Reg

§rd: Reg

§aq: bool

§rl: bool

Amoor

Fields

§rs1: Reg

§rs2: Reg

§rd: Reg

§aq: bool

§rl: bool

Amomin

Fields

§rs1: Reg

§rs2: Reg

§rd: Reg

§aq: bool

§rl: bool

Amomax

Fields

§rs1: Reg

§rs2: Reg

§rd: Reg

§aq: bool

§rl: bool

Amominu

Fields

§rs1: Reg

§rs2: Reg

§rd: Reg

§aq: bool

§rl: bool

Amomaxu

Fields

§rs1: Reg

§rs2: Reg

§rd: Reg

§aq: bool

§rl: bool

AmoswapD

Fields

§rs1: Reg

§rs2: Reg

§rd: Reg

§aq: bool

§rl: bool

AmoaddD

Fields

§rs1: Reg

§rs2: Reg

§rd: Reg

§aq: bool

§rl: bool

AmoxorD

Fields

§rs1: Reg

§rs2: Reg

§rd: Reg

§aq: bool

§rl: bool

AmoandD

Fields

§rs1: Reg

§rs2: Reg

§rd: Reg

§aq: bool

§rl: bool

AmoorD

Fields

§rs1: Reg

§rs2: Reg

§rd: Reg

§aq: bool

§rl: bool

AmominD

Fields

§rs1: Reg

§rs2: Reg

§rd: Reg

§aq: bool

§rl: bool

AmomaxD

Fields

§rs1: Reg

§rs2: Reg

§rd: Reg

§aq: bool

§rl: bool

AmominuD

Fields

§rs1: Reg

§rs2: Reg

§rd: Reg

§aq: bool

§rl: bool

AmomaxuD

Fields

§rs1: Reg

§rs2: Reg

§rd: Reg

§aq: bool

§rl: bool

Lr

Fields

§rs1: Reg

§rd: Reg

§aq: bool

§rl: bool

Sc

Fields

§rs1: Reg

§rs2: Reg

§rd: Reg

§aq: bool

§rl: bool

LrD

Fields

§rs1: Reg

§rd: Reg

§aq: bool

§rl: bool

ScD

Fields

§rs1: Reg

§rs2: Reg

§rd: Reg

§aq: bool

§rl: bool

Trait Implementations§

impl<Reg: Clone> Clone for Rv64AInstruction<Reg>

fn clone(&self) -> Rv64AInstruction<Reg>

Returns a duplicate of the value. Read more

1.0.0 (const: unstable) · Source§

fn clone_from(&mut self, source: &Self)

Performs copy-assignment from source. Read more

impl<Reg: Copy> Copy for Rv64AInstruction<Reg>

impl<Reg: Debug> Debug for Rv64AInstruction<Reg>

fn fmt(&self, f: &mut Formatter<'_>) -> Result

Formats the value using the given formatter. Read more

impl<Reg> Display for Rv64AInstruction<Reg>
where Reg: Display + Copy,

fn fmt(&self, f: &mut Formatter<'_>) -> Result

Formats the value using the given formatter. Read more

impl<Reg: Eq> Eq for Rv64AInstruction<Reg>

impl<Reg> Instruction for Rv64AInstruction<Reg>
where Reg: Register<Type = u64>,

const IMPLEMENTED_EXTENSIONS: &'static [TypeId]

Types of all fully implemented extensions. Read more

type Reg = Reg

A register type used by the instruction

fn try_decode(instruction: u32) -> Option<Self>

Try to decode a single valid instruction

fn alignment() -> u8

Instruction alignment in bytes

fn size(&self) -> u8

Instruction size in bytes

fn implements_extension<E>() -> bool
where E: Instruction<Reg = Self::Reg>,

Checks whether this instruction implements the given extension

impl<Reg: PartialEq> PartialEq for Rv64AInstruction<Reg>

fn eq(&self, other: &Rv64AInstruction<Reg>) -> bool

Equality operator ==. Read more

1.0.0 (const: unstable) · Source§

fn ne(&self, other: &Rhs) -> bool

Inequality operator !=. Read more

impl<Reg: PartialEq> StructuralPartialEq for Rv64AInstruction<Reg>

Auto Trait Implementations§

impl<Reg> Freeze for Rv64AInstruction<Reg>
where Reg: Freeze,

impl<Reg> RefUnwindSafe for Rv64AInstruction<Reg>
where Reg: RefUnwindSafe,

impl<Reg> Send for Rv64AInstruction<Reg>
where Reg: Send,

impl<Reg> Sync for Rv64AInstruction<Reg>
where Reg: Sync,

impl<Reg> Unpin for Rv64AInstruction<Reg>
where Reg: Unpin,

impl<Reg> UnsafeUnpin for Rv64AInstruction<Reg>
where Reg: UnsafeUnpin,

impl<Reg> UnwindSafe for Rv64AInstruction<Reg>
where Reg: UnwindSafe,

Blanket Implementations§

impl<T> Any for T
where T: 'static + ?Sized,

fn type_id(&self) -> TypeId

Gets the TypeId of self. Read more

impl<T> Borrow<T> for T
where T: ?Sized,

fn borrow(&self) -> &T

Immutably borrows from an owned value. Read more

impl<T> BorrowMut<T> for T
where T: ?Sized,

fn borrow_mut(&mut self) -> &mut T

Mutably borrows from an owned value. Read more

impl<T> CloneToUninit for T
where T: Clone,

unsafe fn clone_to_uninit(&self, dest: *mut u8)

🔬This is a nightly-only experimental API. (clone_to_uninit)

Performs copy-assignment from self to dest. Read more

impl<T> From<T> for T

fn from(t: T) -> T

Returns the argument unchanged.

impl<T, U> Into<U> for T
where U: From<T>,

fn into(self) -> U

Calls U::from(self).

That is, this conversion is whatever the implementation of From<T> for U chooses to do.

impl<T> ToOwned for T
where T: Clone,

type Owned = T

The resulting type after obtaining ownership.

fn to_owned(&self) -> T

Creates owned data from borrowed data, usually by cloning. Read more

fn clone_into(&self, target: &mut T)

Uses borrowed data to replace owned data, usually by cloning. Read more

impl<T> ToString for T
where T: Display + ?Sized,

fn to_string(&self) -> String

Converts the given value to a String. Read more

impl<T, U> TryFrom<U> for T
where U: Into<T>,

type Error = Infallible

The type returned in the event of a conversion error.

fn try_from(value: U) -> Result<T, <T as TryFrom<U>>::Error>

Performs the conversion.

impl<T, U> TryInto<U> for T
where U: TryFrom<T>,

type Error = <U as TryFrom<T>>::Error

The type returned in the event of a conversion error.

fn try_into(self) -> Result<U, <U as TryFrom<T>>::Error>

Performs the conversion.