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Rv32ZknInstruction

Enum Rv32ZknInstruction 

Source
pub enum Rv32ZknInstruction<Reg> {
Show 30 variants Andn { rd: Reg, rs1: Reg, rs2: Reg, }, Orn { rd: Reg, rs1: Reg, rs2: Reg, }, Xnor { rd: Reg, rs1: Reg, rs2: Reg, }, Rol { rd: Reg, rs1: Reg, rs2: Reg, }, Ror { rd: Reg, rs1: Reg, rs2: Reg, }, Rori { rd: Reg, rs1: Reg, shamt: u8, }, Rev8 { rd: Reg, rs1: Reg, }, Pack { rd: Reg, rs1: Reg, rs2: Reg, }, Packh { rd: Reg, rs1: Reg, rs2: Reg, }, Brev8 { rd: Reg, rs1: Reg, }, Zip { rd: Reg, rs1: Reg, }, Unzip { rd: Reg, rs1: Reg, }, Clmul { rd: Reg, rs1: Reg, rs2: Reg, }, Clmulh { rd: Reg, rs1: Reg, rs2: Reg, }, Xperm4 { rd: Reg, rs1: Reg, rs2: Reg, }, Xperm8 { rd: Reg, rs1: Reg, rs2: Reg, }, Aes32Dsi { rd: Reg, rs1: Reg, rs2: Reg, bs: Rv32AesBs, }, Aes32Dsmi { rd: Reg, rs1: Reg, rs2: Reg, bs: Rv32AesBs, }, Aes32Esi { rd: Reg, rs1: Reg, rs2: Reg, bs: Rv32AesBs, }, Aes32Esmi { rd: Reg, rs1: Reg, rs2: Reg, bs: Rv32AesBs, }, Sha256Sig0 { rd: Reg, rs1: Reg, }, Sha256Sig1 { rd: Reg, rs1: Reg, }, Sha256Sum0 { rd: Reg, rs1: Reg, }, Sha256Sum1 { rd: Reg, rs1: Reg, }, Sha512Sig0h { rd: Reg, rs1: Reg, rs2: Reg, }, Sha512Sig0l { rd: Reg, rs1: Reg, rs2: Reg, }, Sha512Sig1h { rd: Reg, rs1: Reg, rs2: Reg, }, Sha512Sig1l { rd: Reg, rs1: Reg, rs2: Reg, }, Sha512Sum0r { rd: Reg, rs1: Reg, rs2: Reg, }, Sha512Sum1r { rd: Reg, rs1: Reg, rs2: Reg, },
}
Expand description

RISC-V RV32 Zkn (Zbkb + Zbkc + Zbkx + Zknd + Zkne + Zknh) instruction

Variants§

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Andn

Fields

§rd: Reg
§rs1: Reg
§rs2: Reg
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Orn

Fields

§rd: Reg
§rs1: Reg
§rs2: Reg
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Xnor

Fields

§rd: Reg
§rs1: Reg
§rs2: Reg
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Rol

Fields

§rd: Reg
§rs1: Reg
§rs2: Reg
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Ror

Fields

§rd: Reg
§rs1: Reg
§rs2: Reg
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Rori

Fields

§rd: Reg
§rs1: Reg
§shamt: u8
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Rev8

Fields

§rd: Reg
§rs1: Reg
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Pack

Pack low 16 bits of rs1 into rd[15:0], low 16 bits of rs2 into rd[31:16]

Fields

§rd: Reg
§rs1: Reg
§rs2: Reg
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Packh

Pack low 8 bits of rs1 into rd[7:0], low 8 bits of rs2 into rd[15:8]

Fields

§rd: Reg
§rs1: Reg
§rs2: Reg
§

Brev8

Reverse bits in each byte of rs1

Fields

§rd: Reg
§rs1: Reg
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Zip

Bit-interleave: scatter lower-half bits of rs1 to even positions, upper-half bits to odd positions

Fields

§rd: Reg
§rs1: Reg
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Unzip

Inverse of zip: gather even-position bits of rs1 to lower half, odd-position bits to upper half

Fields

§rd: Reg
§rs1: Reg
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Clmul

Fields

§rd: Reg
§rs1: Reg
§rs2: Reg
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Clmulh

Fields

§rd: Reg
§rs1: Reg
§rs2: Reg
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Xperm4

Fields

§rd: Reg
§rs1: Reg
§rs2: Reg
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Xperm8

Fields

§rd: Reg
§rs1: Reg
§rs2: Reg
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Aes32Dsi

AES final round decryption step: InvSubBytes on one byte of rs2, rotated to the byte lane selected by bs, XOR’d into rs1.

rd = rs1 ^ rol32(INV_SBOX[(rs2 >> (bs*8)) & 0xff] as u32, bs*8)

Fields

§rd: Reg
§rs1: Reg
§rs2: Reg
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Aes32Dsmi

AES middle round decryption step: InvSubBytes + partial InvMixColumns on one byte of rs2, rotated to the byte lane selected by bs, XOR’d into rs1.

rd = rs1 ^ rol32(InvMixColByte(INV_SBOX[(rs2 >> (bs*8)) & 0xff]), bs*8)

Fields

§rd: Reg
§rs1: Reg
§rs2: Reg
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Aes32Esi

AES final round encryption step: SubBytes on one byte of rs2, rotated to the byte lane selected by bs, XOR’d into rs1.

rd = rs1 ^ rol32(SBOX[(rs2 >> (bs*8)) & 0xff] as u32, bs*8)

Fields

§rd: Reg
§rs1: Reg
§rs2: Reg
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Aes32Esmi

AES middle round encryption step: SubBytes + partial MixColumns on one byte of rs2, rotated to the byte lane selected by bs, XOR’d into rs1.

rd = rs1 ^ rol32(MixColByte(SBOX[(rs2 >> (bs*8)) & 0xff]), bs*8)

Fields

§rd: Reg
§rs1: Reg
§rs2: Reg
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Sha256Sig0

Fields

§rd: Reg
§rs1: Reg
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Sha256Sig1

Fields

§rd: Reg
§rs1: Reg
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Sha256Sum0

Fields

§rd: Reg
§rs1: Reg
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Sha256Sum1

Fields

§rd: Reg
§rs1: Reg
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Sha512Sig0h

Fields

§rd: Reg
§rs1: Reg
§rs2: Reg
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Sha512Sig0l

Fields

§rd: Reg
§rs1: Reg
§rs2: Reg
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Sha512Sig1h

Fields

§rd: Reg
§rs1: Reg
§rs2: Reg
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Sha512Sig1l

Fields

§rd: Reg
§rs1: Reg
§rs2: Reg
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Sha512Sum0r

Fields

§rd: Reg
§rs1: Reg
§rs2: Reg
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Sha512Sum1r

Fields

§rd: Reg
§rs1: Reg
§rs2: Reg

Trait Implementations§

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impl<Reg: Clone> Clone for Rv32ZknInstruction<Reg>

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fn clone(&self) -> Rv32ZknInstruction<Reg>

Returns a duplicate of the value. Read more
1.0.0 · Source§

fn clone_from(&mut self, source: &Self)

Performs copy-assignment from source. Read more
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impl<Reg: Debug> Debug for Rv32ZknInstruction<Reg>

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fn fmt(&self, f: &mut Formatter<'_>) -> Result

Formats the value using the given formatter. Read more
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impl<Reg> Display for Rv32ZknInstruction<Reg>
where Reg: Display + Copy,

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fn fmt(&self, f: &mut Formatter<'_>) -> Result

Formats the value using the given formatter. Read more
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impl<Reg> Instruction for Rv32ZknInstruction<Reg>
where Reg: Register<Type = u32>,

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type Reg = Reg

A register type used by the instruction
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fn try_decode(instruction: u32) -> Option<Self>

Try to decode a single valid instruction
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fn alignment() -> u8

Instruction alignment in bytes
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fn size(&self) -> u8

Instruction size in bytes
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impl<Reg: PartialEq> PartialEq for Rv32ZknInstruction<Reg>

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fn eq(&self, other: &Rv32ZknInstruction<Reg>) -> bool

Tests for self and other values to be equal, and is used by ==.
1.0.0 · Source§

fn ne(&self, other: &Rhs) -> bool

Tests for !=. The default implementation is almost always sufficient, and should not be overridden without very good reason.
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impl<Reg: Copy> Copy for Rv32ZknInstruction<Reg>

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impl<Reg: Eq> Eq for Rv32ZknInstruction<Reg>

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impl<Reg> StructuralPartialEq for Rv32ZknInstruction<Reg>

Auto Trait Implementations§

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impl<Reg> Freeze for Rv32ZknInstruction<Reg>
where Reg: Freeze,

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impl<Reg> RefUnwindSafe for Rv32ZknInstruction<Reg>
where Reg: RefUnwindSafe,

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impl<Reg> Send for Rv32ZknInstruction<Reg>
where Reg: Send,

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impl<Reg> Sync for Rv32ZknInstruction<Reg>
where Reg: Sync,

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impl<Reg> Unpin for Rv32ZknInstruction<Reg>
where Reg: Unpin,

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impl<Reg> UnsafeUnpin for Rv32ZknInstruction<Reg>
where Reg: UnsafeUnpin,

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impl<Reg> UnwindSafe for Rv32ZknInstruction<Reg>
where Reg: UnwindSafe,

Blanket Implementations§

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impl<T> Any for T
where T: 'static + ?Sized,

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fn type_id(&self) -> TypeId

Gets the TypeId of self. Read more
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impl<T> Borrow<T> for T
where T: ?Sized,

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fn borrow(&self) -> &T

Immutably borrows from an owned value. Read more
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impl<T> BorrowMut<T> for T
where T: ?Sized,

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fn borrow_mut(&mut self) -> &mut T

Mutably borrows from an owned value. Read more
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impl<T> CloneToUninit for T
where T: Clone,

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unsafe fn clone_to_uninit(&self, dest: *mut u8)

🔬This is a nightly-only experimental API. (clone_to_uninit)
Performs copy-assignment from self to dest. Read more
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impl<T> From<T> for T

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fn from(t: T) -> T

Returns the argument unchanged.

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impl<T, U> Into<U> for T
where U: From<T>,

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fn into(self) -> U

Calls U::from(self).

That is, this conversion is whatever the implementation of From<T> for U chooses to do.

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impl<T> ToOwned for T
where T: Clone,

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type Owned = T

The resulting type after obtaining ownership.
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fn to_owned(&self) -> T

Creates owned data from borrowed data, usually by cloning. Read more
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fn clone_into(&self, target: &mut T)

Uses borrowed data to replace owned data, usually by cloning. Read more
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impl<T> ToString for T
where T: Display + ?Sized,

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fn to_string(&self) -> String

Converts the given value to a String. Read more
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impl<T, U> TryFrom<U> for T
where U: Into<T>,

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type Error = Infallible

The type returned in the event of a conversion error.
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fn try_from(value: U) -> Result<T, <T as TryFrom<U>>::Error>

Performs the conversion.
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impl<T, U> TryInto<U> for T
where U: TryFrom<T>,

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type Error = <U as TryFrom<T>>::Error

The type returned in the event of a conversion error.
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fn try_into(self) -> Result<U, <U as TryFrom<T>>::Error>

Performs the conversion.