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Rv32ZknInstruction

ab_riscv_primitives::instructions::rv32::zk::zkn

Enum Rv32ZknInstruction 

Source 
pub enum Rv32ZknInstruction<Hart>
where
    Hart: HartConfig,
{

Show 30 variants    Andn {
        rs1: Hart::Reg,
        rs2: Hart::Reg,
        rd: Hart::Reg,
    },
    Orn {
        rs1: Hart::Reg,
        rs2: Hart::Reg,
        rd: Hart::Reg,
    },
    Xnor {
        rs1: Hart::Reg,
        rs2: Hart::Reg,
        rd: Hart::Reg,
    },
    Rol {
        rs1: Hart::Reg,
        rs2: Hart::Reg,
        rd: Hart::Reg,
    },
    Ror {
        rs1: Hart::Reg,
        rs2: Hart::Reg,
        rd: Hart::Reg,
    },
    Rori {
        rs1: Hart::Reg,
        rd: Hart::Reg,
        shamt: Shamt<u32>,
        /* private fields */
    },
    Rev8 {
        rs1: Hart::Reg,
        rd: Hart::Reg,
        /* private fields */
    },
    Pack {
        rs1: Hart::Reg,
        rs2: Hart::Reg,
        rd: Hart::Reg,
    },
    Packh {
        rs1: Hart::Reg,
        rs2: Hart::Reg,
        rd: Hart::Reg,
    },
    Brev8 {
        rs1: Hart::Reg,
        rd: Hart::Reg,
        /* private fields */
    },
    Zip {
        rs1: Hart::Reg,
        rd: Hart::Reg,
        /* private fields */
    },
    Unzip {
        rs1: Hart::Reg,
        rd: Hart::Reg,
        /* private fields */
    },
    Clmul {
        rs1: Hart::Reg,
        rs2: Hart::Reg,
        rd: Hart::Reg,
    },
    Clmulh {
        rs1: Hart::Reg,
        rs2: Hart::Reg,
        rd: Hart::Reg,
    },
    Xperm4 {
        rs1: Hart::Reg,
        rs2: Hart::Reg,
        rd: Hart::Reg,
    },
    Xperm8 {
        rs1: Hart::Reg,
        rs2: Hart::Reg,
        rd: Hart::Reg,
    },
    Aes32Dsi {
        rs1: Hart::Reg,
        rs2: Hart::Reg,
        rd: Hart::Reg,
        bs: Rv32AesBs,
    },
    Aes32Dsmi {
        rs1: Hart::Reg,
        rs2: Hart::Reg,
        rd: Hart::Reg,
        bs: Rv32AesBs,
    },
    Aes32Esi {
        rs1: Hart::Reg,
        rs2: Hart::Reg,
        rd: Hart::Reg,
        bs: Rv32AesBs,
    },
    Aes32Esmi {
        rs1: Hart::Reg,
        rs2: Hart::Reg,
        rd: Hart::Reg,
        bs: Rv32AesBs,
    },
    Sha256Sig0 {
        rs1: Hart::Reg,
        rd: Hart::Reg,
        /* private fields */
    },
    Sha256Sig1 {
        rs1: Hart::Reg,
        rd: Hart::Reg,
        /* private fields */
    },
    Sha256Sum0 {
        rs1: Hart::Reg,
        rd: Hart::Reg,
        /* private fields */
    },
    Sha256Sum1 {
        rs1: Hart::Reg,
        rd: Hart::Reg,
        /* private fields */
    },
    Sha512Sig0h {
        rs1: Hart::Reg,
        rs2: Hart::Reg,
        rd: Hart::Reg,
    },
    Sha512Sig0l {
        rs1: Hart::Reg,
        rs2: Hart::Reg,
        rd: Hart::Reg,
    },
    Sha512Sig1h {
        rs1: Hart::Reg,
        rs2: Hart::Reg,
        rd: Hart::Reg,
    },
    Sha512Sig1l {
        rs1: Hart::Reg,
        rs2: Hart::Reg,
        rd: Hart::Reg,
    },
    Sha512Sum0r {
        rs1: Hart::Reg,
        rs2: Hart::Reg,
        rd: Hart::Reg,
    },
    Sha512Sum1r {
        rs1: Hart::Reg,
        rs2: Hart::Reg,
        rd: Hart::Reg,
    },

}
Expand description

RISC-V RV32 Zkn (Zbkb + Zbkc + Zbkx + Zknd + Zkne + Zknh) instruction

Variants§

§

Andn

Fields

§rs1: Hart::Reg
§rs2: Hart::Reg
§rd: Hart::Reg
§

Orn

Fields

§rs1: Hart::Reg
§rs2: Hart::Reg
§rd: Hart::Reg
§

Xnor

Fields

§rs1: Hart::Reg
§rs2: Hart::Reg
§rd: Hart::Reg
§

Rol

Fields

§rs1: Hart::Reg
§rs2: Hart::Reg
§rd: Hart::Reg
§

Ror

Fields

§rs1: Hart::Reg
§rs2: Hart::Reg
§rd: Hart::Reg
§

Rori

Fields

§rs1: Hart::Reg
§rd: Hart::Reg
§shamt: Shamt<u32>
§

Rev8

Fields

§rs1: Hart::Reg
§rd: Hart::Reg
§

Pack

Pack low 16 bits of rs1 into rd[15:0], low 16 bits of rs2 into rd[31:16]

Fields

§rs1: Hart::Reg
§rs2: Hart::Reg
§rd: Hart::Reg
§

Packh

Pack low 8 bits of rs1 into rd[7:0], low 8 bits of rs2 into rd[15:8]

Fields

§rs1: Hart::Reg
§rs2: Hart::Reg
§rd: Hart::Reg
§

Brev8

Reverse bits in each byte of rs1

Fields

§rs1: Hart::Reg
§rd: Hart::Reg
§

Zip

Bit-interleave: scatter lower-half bits of rs1 to even positions, upper-half bits to odd positions

Fields

§rs1: Hart::Reg
§rd: Hart::Reg
§

Unzip

Inverse of zip: gather even-position bits of rs1 to lower half, odd-position bits to upper half

Fields

§rs1: Hart::Reg
§rd: Hart::Reg
§

Clmul

Fields

§rs1: Hart::Reg
§rs2: Hart::Reg
§rd: Hart::Reg
§

Clmulh

Fields

§rs1: Hart::Reg
§rs2: Hart::Reg
§rd: Hart::Reg
§

Xperm4

Fields

§rs1: Hart::Reg
§rs2: Hart::Reg
§rd: Hart::Reg
§

Xperm8

Fields

§rs1: Hart::Reg
§rs2: Hart::Reg
§rd: Hart::Reg
§

Aes32Dsi

AES final round decryption step: InvSubBytes on one byte of rs2, rotated to the byte lane selected by bs, XOR’d into rs1.

rd = rs1 ^ rol32(INV_SBOX[(rs2 >> (bs*8)) & 0xff] as u32, bs*8)

Fields

§rs1: Hart::Reg
§rs2: Hart::Reg
§rd: Hart::Reg
§bs: Rv32AesBs
§

Aes32Dsmi

AES middle round decryption step: InvSubBytes + partial InvMixColumns on one byte of rs2, rotated to the byte lane selected by bs, XOR’d into rs1.

rd = rs1 ^ rol32(InvMixColByte(INV_SBOX[(rs2 >> (bs*8)) & 0xff]), bs*8)

Fields

§rs1: Hart::Reg
§rs2: Hart::Reg
§rd: Hart::Reg
§bs: Rv32AesBs
§

Aes32Esi

AES final round encryption step: SubBytes on one byte of rs2, rotated to the byte lane selected by bs, XOR’d into rs1.

rd = rs1 ^ rol32(SBOX[(rs2 >> (bs*8)) & 0xff] as u32, bs*8)

Fields

§rs1: Hart::Reg
§rs2: Hart::Reg
§rd: Hart::Reg
§bs: Rv32AesBs
§

Aes32Esmi

AES middle round encryption step: SubBytes + partial MixColumns on one byte of rs2, rotated to the byte lane selected by bs, XOR’d into rs1.

rd = rs1 ^ rol32(MixColByte(SBOX[(rs2 >> (bs*8)) & 0xff]), bs*8)

Fields

§rs1: Hart::Reg
§rs2: Hart::Reg
§rd: Hart::Reg
§bs: Rv32AesBs
§

Sha256Sig0

Fields

§rs1: Hart::Reg
§rd: Hart::Reg
§

Sha256Sig1

Fields

§rs1: Hart::Reg
§rd: Hart::Reg
§

Sha256Sum0

Fields

§rs1: Hart::Reg
§rd: Hart::Reg
§

Sha256Sum1

Fields

§rs1: Hart::Reg
§rd: Hart::Reg
§

Sha512Sig0h

Fields

§rs1: Hart::Reg
§rs2: Hart::Reg
§rd: Hart::Reg
§

Sha512Sig0l

Fields

§rs1: Hart::Reg
§rs2: Hart::Reg
§rd: Hart::Reg
§

Sha512Sig1h

Fields

§rs1: Hart::Reg
§rs2: Hart::Reg
§rd: Hart::Reg
§

Sha512Sig1l

Fields

§rs1: Hart::Reg
§rs2: Hart::Reg
§rd: Hart::Reg
§

Sha512Sum0r

Fields

§rs1: Hart::Reg
§rs2: Hart::Reg
§rd: Hart::Reg
§

Sha512Sum1r

Fields

§rs1: Hart::Reg
§rs2: Hart::Reg
§rd: Hart::Reg

Trait Implementations§

Source§

impl<Hart> Clone for Rv32ZknInstruction<Hart>
where Hart: HartConfig + Clone, Hart::Reg: Clone,

Source§

fn clone(&self) -> Rv32ZknInstruction<Hart>

Returns a duplicate of the value. Read more
1.0.0 (const: unstable) · Source§

fn clone_from(&mut self, source: &Self)

Performs copy-assignment from source. Read more
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impl<Hart> Copy for Rv32ZknInstruction<Hart>
where Hart: HartConfig + Copy, Hart::Reg: Copy,

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impl<Hart> Debug for Rv32ZknInstruction<Hart>
where Hart: HartConfig + Debug, Hart::Reg: Debug,

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fn fmt(&self, f: &mut Formatter<'_>) -> Result

Formats the value using the given formatter. Read more
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impl<Reg, Hart> Display for Rv32ZknInstruction<Hart>
where Reg: Display + Copy, Hart: HartConfig<Reg = Reg>,

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fn fmt(&self, f: &mut Formatter<'_>) -> Result

Formats the value using the given formatter. Read more
Source§

impl<Hart> Eq for Rv32ZknInstruction<Hart>
where Hart: HartConfig + Eq, Hart::Reg: Eq,

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impl<Reg, Hart> Instruction for Rv32ZknInstruction<Hart>
where Reg: Register<Type = u32>, Hart: HartConfig<Reg = Reg>,

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const IMPLEMENTED_EXTENSIONS: &'static [ImplementedExtension]

All implemented extensions, including this instruction itself, with their ISA extensions. Read more
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const OWN_ISA_EXTENSIONS: &'static [IsaExtension]

ISA extensions defined by this instruction enum itself, without inherited ones. Read more
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const ALIGNMENT: u8

Instruction alignment in bytes, also known as IALIGN
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type Hart = Hart

Hart configuration of the implementation
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fn try_decode(instruction: u32) -> Option<Self>

Try to decode a single valid instruction
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fn size(&self) -> u8

Instruction size in bytes
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const ISA_STRING: &'static str = _

ISA string as used in the Tag_RISCV_arch attribute of ELF files, for example, rv64i2p1_m2p0_zmmul1p0. Read more
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fn implements_extension<E>() -> bool
where E: Instruction<Hart = Self::Hart>,

Checks whether this instruction implements the given extension, see Self::IMPLEMENTED_EXTENSIONS for details
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impl<Hart> PartialEq for Rv32ZknInstruction<Hart>
where Hart: HartConfig + PartialEq, Hart::Reg: PartialEq,

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fn eq(&self, other: &Rv32ZknInstruction<Hart>) -> bool

Equality operator ==. Read more
1.0.0 (const: unstable) · Source§

fn ne(&self, other: &Rhs) -> bool

Inequality operator !=. Read more
Source§

impl<Hart> StructuralPartialEq for Rv32ZknInstruction<Hart>
where Hart: HartConfig + PartialEq, Hart::Reg: PartialEq,

Auto Trait Implementations§

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impl<Hart> Freeze for Rv32ZknInstruction<Hart>
where <Hart as HartConfig>::Reg: Freeze,

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impl<Hart> RefUnwindSafe for Rv32ZknInstruction<Hart>
where <Hart as HartConfig>::Reg: RefUnwindSafe,

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impl<Hart> Send for Rv32ZknInstruction<Hart>
where <Hart as HartConfig>::Reg: Send,

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impl<Hart> Sync for Rv32ZknInstruction<Hart>
where <Hart as HartConfig>::Reg: Sync,

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impl<Hart> Unpin for Rv32ZknInstruction<Hart>
where <Hart as HartConfig>::Reg: Unpin,

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impl<Hart> UnsafeUnpin for Rv32ZknInstruction<Hart>
where <Hart as HartConfig>::Reg: UnsafeUnpin,

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impl<Hart> UnwindSafe for Rv32ZknInstruction<Hart>
where <Hart as HartConfig>::Reg: UnwindSafe,

Blanket Implementations§

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impl<T> Any for T
where T: 'static + ?Sized,

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fn type_id(&self) -> TypeId

Gets the TypeId of self. Read more
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impl<T> Borrow<T> for T
where T: ?Sized,

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fn borrow(&self) -> &T

Immutably borrows from an owned value. Read more
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impl<T> BorrowMut<T> for T
where T: ?Sized,

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fn borrow_mut(&mut self) -> &mut T

Mutably borrows from an owned value. Read more
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impl<T> CloneToUninit for T
where T: Clone,

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unsafe fn clone_to_uninit(&self, dest: *mut u8)

🔬This is a nightly-only experimental API. (clone_to_uninit)
Performs copy-assignment from self to dest. Read more
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impl<T> From<T> for T

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fn from(t: T) -> T

Returns the argument unchanged.

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impl<T, U> Into<U> for T
where U: From<T>,

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fn into(self) -> U

Calls U::from(self).

That is, this conversion is whatever the implementation of From<T> for U chooses to do.

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impl<T> ToOwned for T
where T: Clone,

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type Owned = T

The resulting type after obtaining ownership.
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fn to_owned(&self) -> T

Creates owned data from borrowed data, usually by cloning. Read more
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fn clone_into(&self, target: &mut T)

Uses borrowed data to replace owned data, usually by cloning. Read more
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impl<T> ToString for T
where T: Display + ?Sized,

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fn to_string(&self) -> String

Converts the given value to a String. Read more
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impl<T, U> TryFrom<U> for T
where U: Into<T>,

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type Error = !

The type returned in the event of a conversion error.
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fn try_from(value: U) -> Result<T, <T as TryFrom<U>>::Error>

Performs the conversion.
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impl<T, U> TryInto<U> for T
where U: TryFrom<T>,

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type Error = <U as TryFrom<T>>::Error

The type returned in the event of a conversion error.
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fn try_into(self) -> Result<U, <U as TryFrom<T>>::Error>

Performs the conversion.