#[repr(u8)]pub enum Vlmul {
M1 = 0,
M2 = 1,
M4 = 2,
M8 = 3,
Mf8 = 5,
Mf4 = 6,
Mf2 = 7,
}Expand description
Vector length multiplier (LMUL) setting
Encoded in vtype[2:0] as a signed 3-bit value.
LMUL = 2^vlmul where vlmul is sign-extended. Positive values give integer multipliers,
negative values give fractional.
Variants§
M1 = 0
LMUL = 1 (vlmul encoding 0b000)
M2 = 1
LMUL = 2 (vlmul encoding 0b001)
M4 = 2
LMUL = 4 (vlmul encoding 0b010)
M8 = 3
LMUL = 8 (vlmul encoding 0b011)
Mf8 = 5
LMUL = 1/8 (vlmul encoding 0b101)
Mf4 = 6
LMUL = 1/4 (vlmul encoding 0b110)
Mf2 = 7
LMUL = 1/2 (vlmul encoding 0b111)
Implementations§
Source§impl Vlmul
impl Vlmul
Sourcepub const fn from_bits(bits: u8) -> Option<Self>
pub const fn from_bits(bits: u8) -> Option<Self>
Decode from the 3-bit vlmul field. Returns None for reserved encoding 0b100.
Sourcepub const fn vlmax(self, vlen_bits: u32, sew_bits: u32) -> u32
pub const fn vlmax(self, vlen_bits: u32, sew_bits: u32) -> u32
Compute VLMAX = LMUL * VLEN / SEW.
For fractional LMUL, this is VLEN / (SEW * denominator).
Returns 0 when the result would be less than 1 (insufficient bits).
Sourcepub const fn register_count(self) -> u8
pub const fn register_count(self) -> u8
Number of vector registers occupied by one register group at this LMUL.
Fractional LMUL values (Mf2, Mf4, Mf8) each occupy exactly 1 register.
Integer LMUL values occupy 1, 2, 4, or 8` registers respectively.
Sourcepub const fn as_fraction(self) -> (u8, u8)
pub const fn as_fraction(self) -> (u8, u8)
LMUL as a (numerator, denominator) fraction where LMUL = num / den.
Both values are powers of two with exactly one equal to 1. Useful for computing
EMUL = (EEW / SEW) * LMUL without floating-point arithmetic.