ab_riscv_primitives/instructions/rv64/zk/
zbkb.rs1#[cfg(test)]
4mod tests;
5
6use crate::instructions::Instruction;
7use crate::instructions::rv64::b::zbb::Rv64ZbbInstruction;
8use crate::registers::general_purpose::Register;
9use ab_riscv_macros::instruction;
10use core::fmt;
11
12#[instruction(
14 reorder = [Andn, Orn, Xnor, Rol, Rolw, Ror, Rori, Roriw, Rorw, Rev8, Pack, Packh, Packw, Brev8],
15 ignore = [Rv64ZbbInstruction],
16 inherit = [Rv64ZbbInstruction],
17)]
18#[derive(Debug, Clone, Copy)]
19#[derive_const(PartialEq, Eq)]
20pub enum Rv64ZbkbInstruction<Reg> {
21 Pack { rd: Reg, rs1: Reg, rs2: Reg },
23 Packh { rd: Reg, rs1: Reg, rs2: Reg },
25 Packw { rd: Reg, rs1: Reg, rs2: Reg },
27 Brev8 { rd: Reg, rs1: Reg },
29}
30
31#[instruction]
32const impl<Reg> Instruction for Rv64ZbkbInstruction<Reg>
33where
34 Reg: [const] Register<Type = u64>,
35{
36 type Reg = Reg;
37
38 #[inline(always)]
39 #[cfg_attr(feature = "no-panic", no_panic_const::no_panic(const))]
40 fn try_decode(instruction: u32) -> Option<Self> {
41 let opcode = (instruction & 0b111_1111) as u8;
42 let rd_bits = ((instruction >> 7) & 0x1f) as u8;
43 let funct3 = ((instruction >> 12) & 0b111) as u8;
44 let rs1_bits = ((instruction >> 15) & 0x1f) as u8;
45 let rs2_bits = ((instruction >> 20) & 0x1f) as u8;
46 let funct7 = ((instruction >> 25) & 0b111_1111) as u8;
47 let funct12 = ((instruction >> 20) & 0xfff) as u16;
48
49 match opcode {
50 0b001_0011 => {
52 let rd = Reg::from_bits(rd_bits)?;
53 let rs1 = Reg::from_bits(rs1_bits)?;
54 match funct3 {
55 0b101 if funct12 == 0b0110_1000_0111 => Some(Self::Brev8 { rd, rs1 }),
57 _ => None,
58 }
59 }
60 0b011_0011 => {
62 let rd = Reg::from_bits(rd_bits)?;
63 let rs1 = Reg::from_bits(rs1_bits)?;
64 let rs2 = Reg::from_bits(rs2_bits)?;
65 match (funct3, funct7) {
66 (0b100, 0b000_0100) => Some(Self::Pack { rd, rs1, rs2 }),
68 (0b111, 0b000_0100) => Some(Self::Packh { rd, rs1, rs2 }),
70 _ => None,
71 }
72 }
73 0b011_1011 => {
75 let rd = Reg::from_bits(rd_bits)?;
76 let rs1 = Reg::from_bits(rs1_bits)?;
77 let rs2 = Reg::from_bits(rs2_bits)?;
78 match (funct3, funct7) {
79 (0b100, 0b000_0100) if rs2_bits != 0 => Some(Self::Packw { rd, rs1, rs2 }),
82 _ => None,
83 }
84 }
85 _ => None,
86 }
87 }
88
89 #[inline(always)]
90 fn alignment() -> u8 {
91 align_of::<u32>() as u8
92 }
93
94 #[inline(always)]
95 fn size(&self) -> u8 {
96 size_of::<u32>() as u8
97 }
98}
99
100#[instruction]
101impl<Reg> fmt::Display for Rv64ZbkbInstruction<Reg>
102where
103 Reg: fmt::Display + Copy,
104{
105 fn fmt(&self, f: &mut fmt::Formatter<'_>) -> fmt::Result {
106 match self {
107 Self::Pack { rd, rs1, rs2 } => write!(f, "pack {rd}, {rs1}, {rs2}"),
108 Self::Packh { rd, rs1, rs2 } => write!(f, "packh {rd}, {rs1}, {rs2}"),
109 Self::Packw { rd, rs1, rs2 } => write!(f, "packw {rd}, {rs1}, {rs2}"),
110 Self::Brev8 { rd, rs1 } => write!(f, "brev8 {rd}, {rs1}"),
111 }
112 }
113}