ab_riscv_primitives/instructions/rv64/zk/
zbkb.rs1#[cfg(test)]
4mod tests;
5
6use crate::instructions::Instruction;
7use crate::instructions::rv64::b::zbb::Rv64ZbbInstruction;
8use crate::registers::general_purpose::Register;
9use ab_riscv_macros::instruction;
10use core::fmt;
11
12#[instruction(
14 reorder = [Andn, Orn, Xnor, Rol, Rolw, Ror, Rori, Roriw, Rorw, Rev8, Pack, Packh, Packw, Brev8],
15 ignore = [Rv64ZbbInstruction],
16 inherit = [Rv64ZbbInstruction],
17)]
18#[derive(Debug, Clone, Copy)]
19#[derive_const(PartialEq, Eq)]
20pub enum Rv64ZbkbInstruction<Reg> {
21 Pack { rd: Reg, rs1: Reg, rs2: Reg },
23 Packh { rd: Reg, rs1: Reg, rs2: Reg },
25 Packw { rd: Reg, rs1: Reg, rs2: Reg },
27 Brev8 { rd: Reg, rs1: Reg },
29}
30
31#[instruction]
32const impl<Reg> Instruction for Rv64ZbkbInstruction<Reg>
33where
34 Reg: [const] Register<Type = u64>,
35{
36 const ALIGNMENT: u8 = align_of::<u32>() as u8;
37
38 type Reg = Reg;
39
40 #[inline(always)]
41 #[cfg_attr(feature = "no-panic", no_panic_const::no_panic(const))]
42 fn try_decode(instruction: u32) -> Option<Self> {
43 let opcode = (instruction & 0b111_1111) as u8;
44 let rd_bits = ((instruction >> 7) & 0x1f) as u8;
45 let funct3 = ((instruction >> 12) & 0b111) as u8;
46 let rs1_bits = ((instruction >> 15) & 0x1f) as u8;
47 let rs2_bits = ((instruction >> 20) & 0x1f) as u8;
48 let funct7 = ((instruction >> 25) & 0b111_1111) as u8;
49 let funct12 = ((instruction >> 20) & 0xfff) as u16;
50
51 match opcode {
52 0b001_0011 => {
54 let rd = Reg::from_bits(rd_bits)?;
55 let rs1 = Reg::from_bits(rs1_bits)?;
56 match funct3 {
57 0b101 if funct12 == 0b0110_1000_0111 => Some(Self::Brev8 { rd, rs1 }),
59 _ => None,
60 }
61 }
62 0b011_0011 => {
64 let rd = Reg::from_bits(rd_bits)?;
65 let rs1 = Reg::from_bits(rs1_bits)?;
66 let rs2 = Reg::from_bits(rs2_bits)?;
67 match (funct3, funct7) {
68 (0b100, 0b000_0100) => Some(Self::Pack { rd, rs1, rs2 }),
70 (0b111, 0b000_0100) => Some(Self::Packh { rd, rs1, rs2 }),
72 _ => None,
73 }
74 }
75 0b011_1011 => {
77 let rd = Reg::from_bits(rd_bits)?;
78 let rs1 = Reg::from_bits(rs1_bits)?;
79 let rs2 = Reg::from_bits(rs2_bits)?;
80 match (funct3, funct7) {
81 (0b100, 0b000_0100) if rs2_bits != 0 => Some(Self::Packw { rd, rs1, rs2 }),
84 _ => None,
85 }
86 }
87 _ => None,
88 }
89 }
90
91 #[inline(always)]
92 fn size(&self) -> u8 {
93 size_of::<u32>() as u8
94 }
95}
96
97#[instruction]
98impl<Reg> fmt::Display for Rv64ZbkbInstruction<Reg>
99where
100 Reg: fmt::Display + Copy,
101{
102 fn fmt(&self, f: &mut fmt::Formatter<'_>) -> fmt::Result {
103 match self {
104 Self::Pack { rd, rs1, rs2 } => write!(f, "pack {rd}, {rs1}, {rs2}"),
105 Self::Packh { rd, rs1, rs2 } => write!(f, "packh {rd}, {rs1}, {rs2}"),
106 Self::Packw { rd, rs1, rs2 } => write!(f, "packw {rd}, {rs1}, {rs2}"),
107 Self::Brev8 { rd, rs1 } => write!(f, "brev8 {rd}, {rs1}"),
108 }
109 }
110}