ab_riscv_primitives/instructions/rv64/b/
zbs.rs

1//! RV64 Zbs extension
2
3#[cfg(test)]
4mod tests;
5
6use crate::instructions::Instruction;
7use crate::registers::general_purpose::Register;
8use ab_riscv_macros::instruction;
9use core::fmt;
10
11/// RISC-V RV64 Zbs instruction (Single-bit instructions)
12#[instruction]
13#[derive(Debug, Clone, Copy)]
14#[derive_const(PartialEq, Eq)]
15pub enum Rv64ZbsInstruction<Reg> {
16    // Single-Bit Set
17    Bset { rd: Reg, rs1: Reg, rs2: Reg },
18    Bseti { rd: Reg, rs1: Reg, shamt: u8 },
19
20    // Single-Bit Clear
21    Bclr { rd: Reg, rs1: Reg, rs2: Reg },
22    Bclri { rd: Reg, rs1: Reg, shamt: u8 },
23
24    // Single-Bit Invert
25    Binv { rd: Reg, rs1: Reg, rs2: Reg },
26    Binvi { rd: Reg, rs1: Reg, shamt: u8 },
27
28    // Single-Bit Extract
29    Bext { rd: Reg, rs1: Reg, rs2: Reg },
30    Bexti { rd: Reg, rs1: Reg, shamt: u8 },
31}
32
33#[instruction]
34const impl<Reg> Instruction for Rv64ZbsInstruction<Reg>
35where
36    Reg: [const] Register<Type = u64>,
37{
38    type Reg = Reg;
39
40    #[inline(always)]
41    #[cfg_attr(feature = "no-panic", no_panic_const::no_panic(const))]
42    fn try_decode(instruction: u32) -> Option<Self> {
43        let opcode = (instruction & 0b111_1111) as u8;
44        let rd_bits = ((instruction >> 7) & 0x1f) as u8;
45        let funct3 = ((instruction >> 12) & 0b111) as u8;
46        let rs1_bits = ((instruction >> 15) & 0x1f) as u8;
47        let rs2_bits = ((instruction >> 20) & 0x1f) as u8;
48        let shamt = ((instruction >> 20) & 0x3f) as u8;
49        let funct7 = ((instruction >> 25) & 0b111_1111) as u8;
50        let funct6 = ((instruction >> 26) & 0b11_1111) as u8;
51
52        match opcode {
53            // R-type instructions
54            0b011_0011 => {
55                let rd = Reg::from_bits(rd_bits)?;
56                let rs1 = Reg::from_bits(rs1_bits)?;
57                let rs2 = Reg::from_bits(rs2_bits)?;
58                match (funct3, funct7) {
59                    (0b001, 0b001_0100) => Some(Self::Bset { rd, rs1, rs2 }),
60                    (0b001, 0b010_0100) => Some(Self::Bclr { rd, rs1, rs2 }),
61                    (0b001, 0b011_0100) => Some(Self::Binv { rd, rs1, rs2 }),
62                    (0b101, 0b010_0100) => Some(Self::Bext { rd, rs1, rs2 }),
63                    _ => None,
64                }
65            }
66            // I-type instructions
67            0b001_0011 => {
68                let rd = Reg::from_bits(rd_bits)?;
69                let rs1 = Reg::from_bits(rs1_bits)?;
70                match (funct3, funct6) {
71                    (0b001, 0b00_1010) => Some(Self::Bseti { rd, rs1, shamt }),
72                    (0b001, 0b01_0010) => Some(Self::Bclri { rd, rs1, shamt }),
73                    (0b001, 0b01_1010) => Some(Self::Binvi { rd, rs1, shamt }),
74                    (0b101, 0b01_0010) => Some(Self::Bexti { rd, rs1, shamt }),
75                    _ => None,
76                }
77            }
78            _ => None,
79        }
80    }
81
82    #[inline(always)]
83    fn alignment() -> u8 {
84        align_of::<u32>() as u8
85    }
86
87    #[inline(always)]
88    fn size(&self) -> u8 {
89        size_of::<u32>() as u8
90    }
91}
92
93#[instruction]
94impl<Reg> fmt::Display for Rv64ZbsInstruction<Reg>
95where
96    Reg: fmt::Display,
97{
98    fn fmt(&self, f: &mut fmt::Formatter<'_>) -> fmt::Result {
99        match self {
100            Self::Bset { rd, rs1, rs2 } => write!(f, "bset {rd}, {rs1}, {rs2}"),
101            Self::Bseti { rd, rs1, shamt } => write!(f, "bseti {rd}, {rs1}, {shamt}"),
102            Self::Bclr { rd, rs1, rs2 } => write!(f, "bclr {rd}, {rs1}, {rs2}"),
103            Self::Bclri { rd, rs1, shamt } => write!(f, "bclri {rd}, {rs1}, {shamt}"),
104            Self::Binv { rd, rs1, rs2 } => write!(f, "binv {rd}, {rs1}, {rs2}"),
105            Self::Binvi { rd, rs1, shamt } => write!(f, "binvi {rd}, {rs1}, {shamt}"),
106            Self::Bext { rd, rs1, rs2 } => write!(f, "bext {rd}, {rs1}, {rs2}"),
107            Self::Bexti { rd, rs1, shamt } => write!(f, "bexti {rd}, {rs1}, {shamt}"),
108        }
109    }
110}
ab_riscv_primitives/instructions/rv64/b/zbs.rs

ab_riscv_primitives/instructions/rv64/b/
zbs.rs
