ab_riscv_primitives/instructions/rv32/zk/
zbkc.rs1use crate::instructions::Instruction;
4use crate::instructions::rv32::b::zbc::Rv32ZbcInstruction;
5use crate::registers::general_purpose::Register;
6use ab_riscv_macros::instruction;
7use core::fmt;
8
9#[instruction(
11 reorder = [Clmul, Clmulh],
12 ignore = [Rv32ZbcInstruction],
13 inherit = [Rv32ZbcInstruction],
14)]
15#[derive(Debug, Clone, Copy)]
16#[derive_const(PartialEq, Eq)]
17pub enum Rv32ZbkcInstruction<Reg> {}
18
19#[instruction]
20const impl<Reg> Instruction for Rv32ZbkcInstruction<Reg>
21where
22 Reg: [const] Register<Type = u32>,
23{
24 const ALIGNMENT: u8 = align_of::<u32>() as u8;
25
26 type Reg = Reg;
27
28 #[inline(always)]
29 #[cfg_attr(feature = "no-panic", no_panic_const::no_panic(const))]
30 fn try_decode(instruction: u32) -> Option<Self> {
31 None
32 }
33
34 #[inline(always)]
35 fn size(&self) -> u8 {
36 size_of::<u32>() as u8
37 }
38}
39
40#[instruction]
41impl<Reg> fmt::Display for Rv32ZbkcInstruction<Reg>
42where
43 Reg: fmt::Display + Copy,
44{
45 fn fmt(&self, f: &mut fmt::Formatter<'_>) -> fmt::Result {
46 match self {}
47 }
48}