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ab_riscv_primitives/instructions/rv32/zk/
zbkc.rs

1//! RV32 Zbkc extension (subset of Zbc extension)
2
3use crate::instructions::Instruction;
4use crate::instructions::rv32::b::zbc::Rv32ZbcInstruction;
5use crate::registers::general_purpose::Register;
6use ab_riscv_macros::instruction;
7use core::fmt;
8
9/// RISC-V RV32 Zbkc instruction
10#[instruction(
11    reorder = [Clmul, Clmulh],
12    ignore = [Rv32ZbcInstruction],
13    inherit = [Rv32ZbcInstruction],
14)]
15#[derive(Debug, Clone, Copy)]
16#[derive_const(PartialEq, Eq)]
17pub enum Rv32ZbkcInstruction<Reg> {}
18
19#[instruction]
20const impl<Reg> Instruction for Rv32ZbkcInstruction<Reg>
21where
22    Reg: [const] Register<Type = u32>,
23{
24    type Reg = Reg;
25
26    #[inline(always)]
27    #[cfg_attr(feature = "no-panic", no_panic_const::no_panic(const))]
28    fn try_decode(instruction: u32) -> Option<Self> {
29        None
30    }
31
32    #[inline(always)]
33    fn alignment() -> u8 {
34        align_of::<u32>() as u8
35    }
36
37    #[inline(always)]
38    fn size(&self) -> u8 {
39        size_of::<u32>() as u8
40    }
41}
42
43#[instruction]
44impl<Reg> fmt::Display for Rv32ZbkcInstruction<Reg>
45where
46    Reg: fmt::Display + Copy,
47{
48    fn fmt(&self, f: &mut fmt::Formatter<'_>) -> fmt::Result {
49        match self {}
50    }
51}