ab_riscv_primitives/instructions/rv32/zk/
zbkb.rs

1//! RV32 Zbkb extension
2
3#[cfg(test)]
4mod tests;
5
6use crate::instructions::Instruction;
7use crate::instructions::rv32::b::zbb::Rv32ZbbInstruction;
8use crate::registers::general_purpose::Register;
9use ab_riscv_macros::instruction;
10use core::fmt;
11
12/// RISC-V RV32 Zbkb instruction (Bit-manipulation for Cryptography)
13#[instruction(
14    reorder = [Andn, Orn, Xnor, Rol, Ror, Rori, Rev8, Pack, Packh, Brev8],
15    ignore = [Rv32ZbbInstruction],
16    inherit = [Rv32ZbbInstruction],
17)]
18#[derive(Debug, Clone, Copy)]
19#[derive_const(PartialEq, Eq)]
20pub enum Rv32ZbkbInstruction<Reg> {
21    /// Pack low 16 bits of `rs1` into `rd[15:0]`, low 16 bits of `rs2` into `rd[31:16]`
22    Pack { rd: Reg, rs1: Reg, rs2: Reg },
23    /// Pack low 8 bits of `rs1` into `rd[7:0]`, low 8 bits of `rs2` into `rd[15:8]`
24    Packh { rd: Reg, rs1: Reg, rs2: Reg },
25    /// Reverse bits in each byte of `rs1`
26    Brev8 { rd: Reg, rs1: Reg },
27    /// Bit-interleave: scatter lower-half bits of `rs1` to even positions, upper-half bits to odd
28    /// positions
29    Zip { rd: Reg, rs1: Reg },
30    /// Inverse of zip: gather even-position bits of `rs1` to lower half, odd-position bits to upper
31    /// half
32    Unzip { rd: Reg, rs1: Reg },
33}
34
35#[instruction]
36const impl<Reg> Instruction for Rv32ZbkbInstruction<Reg>
37where
38    Reg: [const] Register<Type = u32>,
39{
40    const ALIGNMENT: u8 = align_of::<u32>() as u8;
41
42    type Reg = Reg;
43
44    #[inline(always)]
45    #[cfg_attr(feature = "no-panic", no_panic_const::no_panic(const))]
46    fn try_decode(instruction: u32) -> Option<Self> {
47        let opcode = (instruction & 0b111_1111) as u8;
48        let rd_bits = ((instruction >> 7) & 0x1f) as u8;
49        let funct3 = ((instruction >> 12) & 0b111) as u8;
50        let rs1_bits = ((instruction >> 15) & 0x1f) as u8;
51        let rs2_bits = ((instruction >> 20) & 0x1f) as u8;
52        let funct7 = ((instruction >> 25) & 0b111_1111) as u8;
53        let funct12 = ((instruction >> 20) & 0xfff) as u16;
54
55        match opcode {
56            // OP-IMM (I-type): brev8, zip, unzip
57            0b001_0011 => {
58                let rd = Reg::from_bits(rd_bits)?;
59                let rs1 = Reg::from_bits(rs1_bits)?;
60                match funct3 {
61                    // brev8: funct12 = 0b011010000111 = 0x687
62                    0b101 if funct12 == 0b0110_1000_0111 => Some(Self::Brev8 { rd, rs1 }),
63                    // zip:   funct7=0000100, rs2=01111, funct3=001 -> funct12=0x08F
64                    0b001 if funct12 == 0b0000_1000_1111 => Some(Self::Zip { rd, rs1 }),
65                    // unzip: funct7=0000100, rs2=01111, funct3=101 -> funct12=0x08F
66                    0b101 if funct12 == 0b0000_1000_1111 => Some(Self::Unzip { rd, rs1 }),
67                    _ => None,
68                }
69            }
70            // OP (R-type): pack, packh
71            0b011_0011 => {
72                let rd = Reg::from_bits(rd_bits)?;
73                let rs1 = Reg::from_bits(rs1_bits)?;
74                let rs2 = Reg::from_bits(rs2_bits)?;
75                match (funct3, funct7, rs2_bits) {
76                    // pack: funct3=100, funct7=0000100, rs2!=0
77                    // rs2=0 collides with inherited RV32 Zbb zext.h and must fall through.
78                    (0b100, 0b000_0100, rs2_bits) if rs2_bits != 0 => {
79                        Some(Self::Pack { rd, rs1, rs2 })
80                    }
81                    // packh: funct3=111, funct7=0000100
82                    (0b111, 0b000_0100, _) => Some(Self::Packh { rd, rs1, rs2 }),
83                    _ => None,
84                }
85            }
86            _ => None,
87        }
88    }
89
90    #[inline(always)]
91    fn size(&self) -> u8 {
92        size_of::<u32>() as u8
93    }
94}
95
96#[instruction]
97impl<Reg> fmt::Display for Rv32ZbkbInstruction<Reg>
98where
99    Reg: fmt::Display + Copy,
100{
101    fn fmt(&self, f: &mut fmt::Formatter<'_>) -> fmt::Result {
102        match self {
103            Self::Pack { rd, rs1, rs2 } => write!(f, "pack {rd}, {rs1}, {rs2}"),
104            Self::Packh { rd, rs1, rs2 } => write!(f, "packh {rd}, {rs1}, {rs2}"),
105            Self::Brev8 { rd, rs1 } => write!(f, "brev8 {rd}, {rs1}"),
106            Self::Zip { rd, rs1 } => write!(f, "zip {rd}, {rs1}"),
107            Self::Unzip { rd, rs1 } => write!(f, "unzip {rd}, {rs1}"),
108        }
109    }
110}
ab_riscv_primitives/instructions/rv32/zk/zbkb.rs

ab_riscv_primitives/instructions/rv32/zk/
zbkb.rs
