ab_riscv_primitives/instructions/rv32/a/
zaamo.rs

1//! RV32 Zaamo extension
2
3#[cfg(test)]
4mod tests;
5
6use crate::hart::HartConfig;
7use crate::instructions::{ImplementedExtension, Instruction, IsaExtension};
8use crate::registers::general_purpose::Register;
9use ab_riscv_macros::instruction;
10use core::fmt;
11
12/// RISC-V RV32 Zaamo instruction (Atomic memory operations)
13#[instruction]
14#[derive(Debug, Clone, Copy)]
15#[derive_const(PartialEq, Eq)]
16#[rustfmt::skip]
17pub enum Rv32ZaamoInstruction<Hart>
18where
19    Hart: HartConfig,
20{
21    Amoswap { rd: Hart::Reg, rs1: Hart::Reg, rs2: Hart::Reg, aq: bool, rl: bool },
22    Amoadd { rd: Hart::Reg, rs1: Hart::Reg, rs2: Hart::Reg, aq: bool, rl: bool },
23    Amoxor { rd: Hart::Reg, rs1: Hart::Reg, rs2: Hart::Reg, aq: bool, rl: bool },
24    Amoand { rd: Hart::Reg, rs1: Hart::Reg, rs2: Hart::Reg, aq: bool, rl: bool },
25    Amoor { rd: Hart::Reg, rs1: Hart::Reg, rs2: Hart::Reg, aq: bool, rl: bool },
26    Amomin { rd: Hart::Reg, rs1: Hart::Reg, rs2: Hart::Reg, aq: bool, rl: bool },
27    Amomax { rd: Hart::Reg, rs1: Hart::Reg, rs2: Hart::Reg, aq: bool, rl: bool },
28    Amominu { rd: Hart::Reg, rs1: Hart::Reg, rs2: Hart::Reg, aq: bool, rl: bool },
29    Amomaxu { rd: Hart::Reg, rs1: Hart::Reg, rs2: Hart::Reg, aq: bool, rl: bool },
30}
31
32#[instruction]
33const impl<Reg, Hart> Instruction for Rv32ZaamoInstruction<Hart>
34where
35    Reg: [const] Register<Type = u32>,
36    Hart: [const] HartConfig<Reg = Reg>,
37{
38    const OWN_ISA_EXTENSIONS: &'static [IsaExtension] = &[IsaExtension::new("zaamo", 1, 0)];
39
40    const ALIGNMENT: u8 = align_of::<u32>() as u8;
41
42    type Hart = Hart;
43
44    #[inline(always)]
45    #[cfg_attr(feature = "no-panic", no_panic_const::no_panic(const))]
46    fn try_decode(instruction: u32) -> Option<Self> {
47        let opcode = (instruction & 0b111_1111) as u8;
48        let rd_bits = ((instruction >> 7) & 0x1f) as u8;
49        let funct3 = ((instruction >> 12) & 0b111) as u8;
50        let rs1_bits = ((instruction >> 15) & 0x1f) as u8;
51        let rs2_bits = ((instruction >> 20) & 0x1f) as u8;
52        let funct7 = ((instruction >> 25) & 0b111_1111) as u8;
53
54        match (opcode, funct3) {
55            // AMO, word-sized (only size that exists in RV32)
56            (0b010_1111, 0b010) => {
57                let rd = Reg::from_bits(rd_bits)?;
58                let rs1 = Reg::from_bits(rs1_bits)?;
59                let rs2 = Reg::from_bits(rs2_bits)?;
60                let funct5 = funct7 >> 2;
61                let aq = (funct7 & 0b10) != 0;
62                let rl = (funct7 & 0b01) != 0;
63
64                match funct5 {
65                    0b00001 => Some(Self::Amoswap {
66                        rd,
67                        rs1,
68                        rs2,
69                        aq,
70                        rl,
71                    }),
72                    0b00000 => Some(Self::Amoadd {
73                        rd,
74                        rs1,
75                        rs2,
76                        aq,
77                        rl,
78                    }),
79                    0b00100 => Some(Self::Amoxor {
80                        rd,
81                        rs1,
82                        rs2,
83                        aq,
84                        rl,
85                    }),
86                    0b01100 => Some(Self::Amoand {
87                        rd,
88                        rs1,
89                        rs2,
90                        aq,
91                        rl,
92                    }),
93                    0b01000 => Some(Self::Amoor {
94                        rd,
95                        rs1,
96                        rs2,
97                        aq,
98                        rl,
99                    }),
100                    0b10000 => Some(Self::Amomin {
101                        rd,
102                        rs1,
103                        rs2,
104                        aq,
105                        rl,
106                    }),
107                    0b10100 => Some(Self::Amomax {
108                        rd,
109                        rs1,
110                        rs2,
111                        aq,
112                        rl,
113                    }),
114                    0b11000 => Some(Self::Amominu {
115                        rd,
116                        rs1,
117                        rs2,
118                        aq,
119                        rl,
120                    }),
121                    0b11100 => Some(Self::Amomaxu {
122                        rd,
123                        rs1,
124                        rs2,
125                        aq,
126                        rl,
127                    }),
128                    _ => None,
129                }
130            }
131            _ => None,
132        }
133    }
134
135    #[inline(always)]
136    fn size(&self) -> u8 {
137        size_of::<u32>() as u8
138    }
139}
140
141/// Format `aq`/`rl` suffix for display
142#[inline(always)]
143fn aq_rl_suffix(aq: &bool, rl: &bool) -> &'static str {
144    match (*aq, *rl) {
145        (false, false) => "",
146        (true, false) => ".aq",
147        (false, true) => ".rl",
148        (true, true) => ".aqrl",
149    }
150}
151
152#[instruction]
153impl<Reg, Hart> fmt::Display for Rv32ZaamoInstruction<Hart>
154where
155    Reg: fmt::Display,
156    Hart: HartConfig<Reg = Reg>,
157{
158    fn fmt(&self, f: &mut fmt::Formatter<'_>) -> fmt::Result {
159        #[rustfmt::skip]
160        match self {
161            Self::Amoswap { rd, rs1, rs2, aq, rl } => write!(f, "amoswap.w{} {rd}, {rs2}, ({rs1})", aq_rl_suffix(aq, rl)),
162            Self::Amoadd { rd, rs1, rs2, aq, rl } => write!(f, "amoadd.w{} {rd}, {rs2}, ({rs1})", aq_rl_suffix(aq, rl)),
163            Self::Amoxor { rd, rs1, rs2, aq, rl } => write!(f, "amoxor.w{} {rd}, {rs2}, ({rs1})", aq_rl_suffix(aq, rl)),
164            Self::Amoand { rd, rs1, rs2, aq, rl } => write!(f, "amoand.w{} {rd}, {rs2}, ({rs1})", aq_rl_suffix(aq, rl)),
165            Self::Amoor { rd, rs1, rs2, aq, rl } => write!(f, "amoor.w{} {rd}, {rs2}, ({rs1})", aq_rl_suffix(aq, rl)),
166            Self::Amomin { rd, rs1, rs2, aq, rl } => write!(f, "amomin.w{} {rd}, {rs2}, ({rs1})", aq_rl_suffix(aq, rl)),
167            Self::Amomax { rd, rs1, rs2, aq, rl } => write!(f, "amomax.w{} {rd}, {rs2}, ({rs1})", aq_rl_suffix(aq, rl)),
168            Self::Amominu { rd, rs1, rs2, aq, rl } => write!(f, "amominu.w{} {rd}, {rs2}, ({rs1})", aq_rl_suffix(aq, rl)),
169            Self::Amomaxu { rd, rs1, rs2, aq, rl } => write!(f, "amomaxu.w{} {rd}, {rs2}, ({rs1})", aq_rl_suffix(aq, rl)),
170        }
171    }
172}
ab_riscv_primitives/instructions/rv32/a/zaamo.rs

ab_riscv_primitives/instructions/rv32/a/
zaamo.rs
