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ab_riscv_primitives/instruction/rv64/m/
zmmul.rs

1//! RV64 Zmmul extension (multiplication subset of M extension)
2
3use crate::instruction::Instruction;
4use crate::instruction::rv64::m::Rv64MInstruction;
5use crate::registers::Register;
6use ab_riscv_macros::instruction;
7use core::fmt;
8
9/// RISC-V RV64 Zmmul instruction
10#[instruction(
11    reorder = [Mul, Mulh, Mulhsu, Mulhu, Mulw],
12    ignore = [Rv64MInstruction],
13    inherit = [Rv64MInstruction],
14)]
15#[derive(Debug, Clone, Copy, PartialEq, Eq)]
16pub enum Rv64ZmmulInstruction<Reg> {}
17
18#[instruction]
19impl<Reg> const Instruction for Rv64ZmmulInstruction<Reg>
20where
21    Reg: [const] Register<Type = u64>,
22{
23    type Reg = Reg;
24
25    #[inline(always)]
26    fn try_decode(instruction: u32) -> Option<Self> {
27        None
28    }
29
30    #[inline(always)]
31    fn alignment() -> u8 {
32        size_of::<u32>() as u8
33    }
34
35    #[inline(always)]
36    fn size(&self) -> u8 {
37        size_of::<u32>() as u8
38    }
39}
40
41#[instruction]
42impl<Reg> fmt::Display for Rv64ZmmulInstruction<Reg>
43where
44    Reg: fmt::Display + Copy,
45{
46    fn fmt(&self, f: &mut fmt::Formatter<'_>) -> fmt::Result {
47        match self {}
48    }
49}