ab_riscv_primitives/
instruction.rs

1//! This module defines the RISC-V instruction set for the RV64 architecture
2
3pub mod b_64_ext;
4pub mod m_64_ext;
5pub mod rv64;
6#[cfg(test)]
7mod test_utils;
8pub mod tuples;
9
10use crate::registers::Register;
11use core::fmt;
12use core::marker::Destruct;
13
14/// Generic instruction
15pub const trait Instruction:
16    fmt::Display + fmt::Debug + [const] Destruct + Copy + Sized
17{
18    /// Lower-level instruction like [`Rv64Instruction`]
19    ///
20    /// [`Rv64Instruction`]: rv64::Rv64Instruction
21    type Base: BaseInstruction;
22
23    /// Try to decode a single valid instruction
24    fn try_decode(instruction: u32) -> Option<Self>;
25
26    // TODO: `alignment` method in addition to size
27    /// Instruction size in bytes
28    fn size(&self) -> u8;
29}
30
31/// Generic base instruction
32pub const trait BaseInstruction: [const] Instruction {
33    /// A register type used by the instruction
34    type Reg: Register;
35
36    /// Create an instruction from a lower-level base instruction
37    fn from_base(base: Self::Base) -> Self;
38
39    /// Decode a single instruction
40    fn decode(instruction: u32) -> Self;
41}
ab_riscv_primitives/instruction.rs

ab_riscv_primitives/
instruction.rs
