ab_riscv_interpreter/
zicond.rs1#[cfg(test)]
4mod tests;
5
6use crate::{
7 ExecutableInstruction, ExecutableInstructionCsr, ExecutableInstructionOperands, ExecutionError,
8 ExecutionResult, FetchInstructionResult, InstructionFetcher, OpaqueThreadedExecutionResult,
9 RegisterFile, Rs1Rs2OperandValues, Rs1Rs2Operands, ThreadedExecutableInstruction,
10 ThreadedExecutionResult,
11};
12use ab_riscv_macros::instruction_execution;
13use ab_riscv_primitives::prelude::*;
14
15#[instruction_execution]
16const impl<Reg, Hart> ExecutableInstructionOperands for ZicondInstruction<Hart>
17where
18 Reg: Register,
19 Hart: HartConfig<Reg = Reg>,
20{
21}
22
23#[instruction_execution]
24const impl<Reg, Hart, Env> ExecutableInstructionCsr<Env> for ZicondInstruction<Hart>
25where
26 Reg: Register,
27 Hart: HartConfig<Reg = Reg>,
28{
29}
30
31#[instruction_execution]
32const impl<Reg, Hart, Regs, Env, Memory, PC> ExecutableInstruction<Regs, Env, Memory, PC>
33 for ZicondInstruction<Hart>
34where
35 Reg: [const] Register,
36 Hart: HartConfig<Reg = Reg>,
37 Regs: [const] RegisterFile<Reg>,
38{
39 #[inline(always)]
40 #[cfg_attr(feature = "no-panic", no_panic_const::no_panic(const))]
41 fn execute(
42 self,
43 Rs1Rs2OperandValues {
44 rs1_value,
45 rs2_value,
46 }: Rs1Rs2OperandValues<Reg::Type>,
47 _regs: &mut Regs,
48 _env: &mut Env,
49 _memory: &mut Memory,
50 _program_counter: &PC,
51 ) -> ExecutionResult<Reg> {
52 match self {
53 Self::CzeroEqz { rd, rs1: _, rs2: _ } => {
57 let condition = rs2_value;
58 let src = rs1_value;
59 let result = if condition == Reg::Type::from(0u8) {
60 Reg::Type::from(0u8)
61 } else {
62 src
63 };
64 ExecutionResult::Continue { rd, value: result }
65 }
66
67 Self::CzeroNez { rd, rs1: _, rs2: _ } => {
71 let condition = rs2_value;
72 let src = rs1_value;
73 let result = if condition == Reg::Type::from(0u8) {
74 src
75 } else {
76 Reg::Type::from(0u8)
77 };
78 ExecutionResult::Continue { rd, value: result }
79 }
80 }
81 }
82}