ab_riscv_interpreter/v/
zvexx.rs

1//! ZveXx extension
2
3pub mod arith;
4pub mod carry;
5pub mod config;
6pub mod fixed_point;
7pub mod load;
8pub mod mask;
9pub mod muldiv;
10pub mod perm;
11pub mod reduction;
12pub mod store;
13pub mod widen_narrow;
14pub mod zvexx_helpers;
15
16use crate::v::vector_registers::VectorRegistersExt;
17use crate::v::zvexx::arith::zvexx_arith_helpers;
18use crate::v::zvexx::carry::zvexx_carry_helpers;
19use crate::v::zvexx::config::zvexx_config_helpers;
20use crate::v::zvexx::fixed_point::zvexx_fixed_point_helpers;
21use crate::v::zvexx::load::zvexx_load_helpers;
22use crate::v::zvexx::mask::zvexx_mask_helpers;
23use crate::v::zvexx::muldiv::zvexx_muldiv_helpers;
24use crate::v::zvexx::perm::zvexx_perm_helpers;
25use crate::v::zvexx::reduction::zvexx_reduction_helpers;
26use crate::v::zvexx::store::zvexx_store_helpers;
27use crate::v::zvexx::widen_narrow::zvexx_widen_narrow_helpers;
28use crate::zicsr::zicsr_helpers;
29use crate::{
30    CsrError, Csrs, ExecutableInstruction, ExecutableInstructionCsr, ExecutableInstructionOperands,
31    ExecutionError, ExecutionResult, FetchInstructionResult, InstructionFetcher,
32    OpaqueThreadedExecutionResult, PackedAddress, ProgramCounter, RegisterFile,
33    Rs1Rs2OperandValues, Rs1Rs2Operands, ThreadedExecutableInstruction, ThreadedExecutionResult,
34    VirtualMemory,
35};
36use ab_riscv_macros::instruction_execution;
37use ab_riscv_primitives::prelude::*;
38
39#[instruction_execution]
40const impl<Reg> ExecutableInstructionOperands for ZveXxInstruction<Reg> where Reg: Register {}
41
42#[instruction_execution]
43const impl<Reg, Env> ExecutableInstructionCsr<Env> for ZveXxInstruction<Reg> where Reg: Register {}
44
45#[instruction_execution]
46impl<Reg, Regs, Env, Memory, PC> ExecutableInstruction<Regs, Env, Memory, PC>
47    for ZveXxInstruction<Reg>
48where
49    Reg: Register,
50{
51    #[inline(always)]
52    #[cfg_attr(feature = "no-panic", no_panic_const::no_panic)]
53    fn execute(
54        self,
55        Rs1Rs2OperandValues {
56            rs1_value,
57            rs2_value,
58        }: Rs1Rs2OperandValues<<Self::Reg as Register>::Type>,
59        _regs: &mut Regs,
60        env: &mut Env,
61        memory: &mut Memory,
62        program_counter: &mut PC,
63    ) -> ExecutionResult<Self::Reg> {
64        ExecutionResult::ContinueNoWrite
65    }
66}
ab_riscv_interpreter/v/zvexx.rs

ab_riscv_interpreter/v/
zvexx.rs
