ab_riscv_interpreter/rv64/zk/zkn/zknh/
rv64_zknh_helpers.rs

1//! Opaque helpers for RV64 Zknh extension
2
3#[inline(always)]
4#[doc(hidden)]
5pub fn sha256sig0(x: u32) -> u32 {
6    // TODO: Miri is excluded because corresponding intrinsic is not implemented there
7    cfg_select! {
8        all(not(miri), target_arch = "riscv64", target_feature = "zknh") => {
9            // SAFETY: Compile-time checked for supported feature
10            unsafe { core::arch::riscv64::sha256sig0(x) }
11        }
12        _ => {
13            x.rotate_right(7) ^ x.rotate_right(18) ^ (x >> 3)
14        }
15    }
16}
17
18#[inline(always)]
19#[doc(hidden)]
20pub fn sha256sig1(x: u32) -> u32 {
21    // TODO: Miri is excluded because corresponding intrinsic is not implemented there
22    cfg_select! {
23        all(not(miri), target_arch = "riscv64", target_feature = "zknh") => {
24            // SAFETY: Compile-time checked for supported feature
25            unsafe { core::arch::riscv64::sha256sig1(x) }
26        }
27        _ => {
28            x.rotate_right(17) ^ x.rotate_right(19) ^ (x >> 10)
29        }
30    }
31}
32
33#[inline(always)]
34#[doc(hidden)]
35pub fn sha256sum0(x: u32) -> u32 {
36    // TODO: Miri is excluded because corresponding intrinsic is not implemented there
37    cfg_select! {
38        all(not(miri), target_arch = "riscv64", target_feature = "zknh") => {
39            // SAFETY: Compile-time checked for supported feature
40            unsafe { core::arch::riscv64::sha256sum0(x) }
41        }
42        _ => {
43            x.rotate_right(2) ^ x.rotate_right(13) ^ x.rotate_right(22)
44        }
45    }
46}
47
48#[inline(always)]
49#[doc(hidden)]
50pub fn sha256sum1(x: u32) -> u32 {
51    // TODO: Miri is excluded because corresponding intrinsic is not implemented there
52    cfg_select! {
53        all(not(miri), target_arch = "riscv64", target_feature = "zknh") => {
54            // SAFETY: Compile-time checked for supported feature
55            unsafe { core::arch::riscv64::sha256sum1(x) }
56        }
57        _ => {
58            x.rotate_right(6) ^ x.rotate_right(11) ^ x.rotate_right(25)
59        }
60    }
61}
62
63#[inline(always)]
64#[doc(hidden)]
65pub fn sha512sig0(x: u64) -> u64 {
66    // TODO: Miri is excluded because corresponding intrinsic is not implemented there
67    cfg_select! {
68        all(not(miri), target_arch = "riscv64", target_feature = "zknh") => {
69            // SAFETY: Compile-time checked for supported feature
70            unsafe { core::arch::riscv64::sha512sig0(x) }
71        }
72        _ => {
73            x.rotate_right(1) ^ x.rotate_right(8) ^ (x >> 7)
74        }
75    }
76}
77
78#[inline(always)]
79#[doc(hidden)]
80pub fn sha512sig1(x: u64) -> u64 {
81    // TODO: Miri is excluded because corresponding intrinsic is not implemented there
82    cfg_select! {
83        all(not(miri), target_arch = "riscv64", target_feature = "zknh") => {
84            // SAFETY: Compile-time checked for supported feature
85            unsafe { core::arch::riscv64::sha512sig1(x) }
86        }
87        _ => {
88            x.rotate_right(19) ^ x.rotate_right(61) ^ (x >> 6)
89        }
90    }
91}
92
93#[inline(always)]
94#[doc(hidden)]
95pub fn sha512sum0(x: u64) -> u64 {
96    // TODO: Miri is excluded because corresponding intrinsic is not implemented there
97    cfg_select! {
98        all(not(miri), target_arch = "riscv64", target_feature = "zknh") => {
99            // SAFETY: Compile-time checked for supported feature
100            unsafe { core::arch::riscv64::sha512sum0(x) }
101        }
102        _ => {
103            x.rotate_right(28) ^ x.rotate_right(34) ^ x.rotate_right(39)
104        }
105    }
106}
107
108#[inline(always)]
109#[doc(hidden)]
110pub fn sha512sum1(x: u64) -> u64 {
111    // TODO: Miri is excluded because corresponding intrinsic is not implemented there
112    cfg_select! {
113        all(not(miri), target_arch = "riscv64", target_feature = "zknh") => {
114            // SAFETY: Compile-time checked for supported feature
115            unsafe { core::arch::riscv64::sha512sum1(x) }
116        }
117        _ => {
118            x.rotate_right(14) ^ x.rotate_right(18) ^ x.rotate_right(41)
119        }
120    }
121}
ab_riscv_interpreter/rv64/zk/zkn/zknh/rv64_zknh_helpers.rs

ab_riscv_interpreter/rv64/zk/zkn/zknh/
rv64_zknh_helpers.rs
