ab_riscv_interpreter/rv64/zk/zkn/
zknh.rs

1//! RV64 Zknh extension
2
3pub mod rv64_zknh_helpers;
4#[cfg(test)]
5mod tests;
6
7use crate::{
8    ExecutableInstruction, ExecutableInstructionCsr, ExecutableInstructionOperands, ExecutionError,
9    ExecutionResult, FetchInstructionResult, InstructionFetcher, OpaqueThreadedExecutionResult,
10    RegisterFile, Rs1Rs2OperandValues, Rs1Rs2Operands, ThreadedExecutableInstruction,
11    ThreadedExecutionResult,
12};
13use ab_riscv_macros::instruction_execution;
14use ab_riscv_primitives::prelude::*;
15
16#[instruction_execution]
17const impl<Reg, Hart> ExecutableInstructionOperands for Rv64ZknhInstruction<Hart>
18where
19    Reg: Register<Type = u64>,
20    Hart: HartConfig<Reg = Reg>,
21{
22}
23
24#[instruction_execution]
25const impl<Reg, Hart, Env> ExecutableInstructionCsr<Env> for Rv64ZknhInstruction<Hart>
26where
27    Reg: Register<Type = u64>,
28    Hart: HartConfig<Reg = Reg>,
29{
30}
31
32#[instruction_execution]
33const impl<Reg, Hart, Regs, Env, Memory, PC> ExecutableInstruction<Regs, Env, Memory, PC>
34    for Rv64ZknhInstruction<Hart>
35where
36    Reg: [const] Register<Type = u64>,
37    Hart: HartConfig<Reg = Reg>,
38    Regs: [const] RegisterFile<Reg>,
39{
40    #[inline(always)]
41    #[cfg_attr(feature = "no-panic", no_panic_const::no_panic(const))]
42    fn execute(
43        self,
44        Rs1Rs2OperandValues {
45            rs1_value,
46            rs2_value: _,
47        }: Rs1Rs2OperandValues<Reg::Type>,
48        _regs: &mut Regs,
49        _env: &mut Env,
50        _memory: &mut Memory,
51        _program_counter: &PC,
52    ) -> ExecutionResult<Reg> {
53        match self {
54            Self::Sha256Sig0 { rd, rs1: _ } => {
55                let x = rs1_value as u32;
56
57                let res32 = rv64_zknh_helpers::sha256sig0(x);
58
59                ExecutionResult::Continue {
60                    rd,
61                    value: i64::from(res32.cast_signed()).cast_unsigned(),
62                }
63            }
64            Self::Sha256Sig1 { rd, rs1: _ } => {
65                let x = rs1_value as u32;
66
67                let res32 = rv64_zknh_helpers::sha256sig1(x);
68
69                ExecutionResult::Continue {
70                    rd,
71                    value: i64::from(res32.cast_signed()).cast_unsigned(),
72                }
73            }
74            Self::Sha256Sum0 { rd, rs1: _ } => {
75                let x = rs1_value as u32;
76
77                let res32 = rv64_zknh_helpers::sha256sum0(x);
78
79                ExecutionResult::Continue {
80                    rd,
81                    value: i64::from(res32.cast_signed()).cast_unsigned(),
82                }
83            }
84            Self::Sha256Sum1 { rd, rs1: _ } => {
85                let x = rs1_value as u32;
86
87                let res32 = rv64_zknh_helpers::sha256sum1(x);
88
89                ExecutionResult::Continue {
90                    rd,
91                    value: i64::from(res32.cast_signed()).cast_unsigned(),
92                }
93            }
94            Self::Sha512Sig0 { rd, rs1: _ } => {
95                let x = rs1_value;
96
97                ExecutionResult::Continue {
98                    rd,
99                    value: rv64_zknh_helpers::sha512sig0(x),
100                }
101            }
102            Self::Sha512Sig1 { rd, rs1: _ } => {
103                let x = rs1_value;
104
105                ExecutionResult::Continue {
106                    rd,
107                    value: rv64_zknh_helpers::sha512sig1(x),
108                }
109            }
110            Self::Sha512Sum0 { rd, rs1: _ } => {
111                let x = rs1_value;
112
113                ExecutionResult::Continue {
114                    rd,
115                    value: rv64_zknh_helpers::sha512sum0(x),
116                }
117            }
118            Self::Sha512Sum1 { rd, rs1: _ } => {
119                let x = rs1_value;
120
121                ExecutionResult::Continue {
122                    rd,
123                    value: rv64_zknh_helpers::sha512sum1(x),
124                }
125            }
126        }
127    }
128}
ab_riscv_interpreter/rv64/zk/zkn/zknh.rs

ab_riscv_interpreter/rv64/zk/zkn/
zknh.rs
