ab_riscv_interpreter/rv64/zk/zkn/
zknh.rs1pub mod rv64_zknh_helpers;
4#[cfg(test)]
5mod tests;
6
7use crate::{
8 ExecutableInstruction, ExecutableInstructionCsr, ExecutableInstructionOperands, ExecutionError,
9 ExecutionResult, FetchInstructionResult, InstructionFetcher, OpaqueThreadedExecutionResult,
10 RegisterFile, Rs1Rs2OperandValues, Rs1Rs2Operands, ThreadedExecutableInstruction,
11 ThreadedExecutionResult,
12};
13use ab_riscv_macros::instruction_execution;
14use ab_riscv_primitives::prelude::*;
15
16#[instruction_execution]
17const impl<Reg> ExecutableInstructionOperands for Rv64ZknhInstruction<Reg> where
18 Reg: Register<Type = u64>
19{
20}
21
22#[instruction_execution]
23const impl<Reg, Env> ExecutableInstructionCsr<Env> for Rv64ZknhInstruction<Reg> where
24 Reg: Register<Type = u64>
25{
26}
27
28#[instruction_execution]
29const impl<Reg, Regs, Env, Memory, PC> ExecutableInstruction<Regs, Env, Memory, PC>
30 for Rv64ZknhInstruction<Reg>
31where
32 Reg: [const] Register<Type = u64>,
33 Regs: [const] RegisterFile<Reg>,
34{
35 #[inline(always)]
36 #[cfg_attr(feature = "no-panic", no_panic_const::no_panic(const))]
37 fn execute(
38 self,
39 Rs1Rs2OperandValues {
40 rs1_value,
41 rs2_value: _,
42 }: Rs1Rs2OperandValues<<Self::Reg as Register>::Type>,
43 _regs: &mut Regs,
44 _env: &mut Env,
45 _memory: &mut Memory,
46 _program_counter: &mut PC,
47 ) -> ExecutionResult<Self::Reg> {
48 match self {
49 Self::Sha256Sig0 { rd, rs1: _ } => {
50 let x = rs1_value as u32;
51
52 let res32 = rv64_zknh_helpers::sha256sig0(x);
53
54 ExecutionResult::Continue {
55 rd,
56 value: i64::from(res32.cast_signed()).cast_unsigned(),
57 }
58 }
59 Self::Sha256Sig1 { rd, rs1: _ } => {
60 let x = rs1_value as u32;
61
62 let res32 = rv64_zknh_helpers::sha256sig1(x);
63
64 ExecutionResult::Continue {
65 rd,
66 value: i64::from(res32.cast_signed()).cast_unsigned(),
67 }
68 }
69 Self::Sha256Sum0 { rd, rs1: _ } => {
70 let x = rs1_value as u32;
71
72 let res32 = rv64_zknh_helpers::sha256sum0(x);
73
74 ExecutionResult::Continue {
75 rd,
76 value: i64::from(res32.cast_signed()).cast_unsigned(),
77 }
78 }
79 Self::Sha256Sum1 { rd, rs1: _ } => {
80 let x = rs1_value as u32;
81
82 let res32 = rv64_zknh_helpers::sha256sum1(x);
83
84 ExecutionResult::Continue {
85 rd,
86 value: i64::from(res32.cast_signed()).cast_unsigned(),
87 }
88 }
89 Self::Sha512Sig0 { rd, rs1: _ } => {
90 let x = rs1_value;
91
92 ExecutionResult::Continue {
93 rd,
94 value: rv64_zknh_helpers::sha512sig0(x),
95 }
96 }
97 Self::Sha512Sig1 { rd, rs1: _ } => {
98 let x = rs1_value;
99
100 ExecutionResult::Continue {
101 rd,
102 value: rv64_zknh_helpers::sha512sig1(x),
103 }
104 }
105 Self::Sha512Sum0 { rd, rs1: _ } => {
106 let x = rs1_value;
107
108 ExecutionResult::Continue {
109 rd,
110 value: rv64_zknh_helpers::sha512sum0(x),
111 }
112 }
113 Self::Sha512Sum1 { rd, rs1: _ } => {
114 let x = rs1_value;
115
116 ExecutionResult::Continue {
117 rd,
118 value: rv64_zknh_helpers::sha512sum1(x),
119 }
120 }
121 }
122 }
123}