ab_riscv_interpreter/rv64/zk/zkn/
zknd.rs

1//! RV64 Zknd extension
2
3pub mod rv64_zknd_helpers;
4#[cfg(test)]
5mod tests;
6
7use crate::{
8    ExecutableInstruction, ExecutableInstructionCsr, ExecutableInstructionOperands, ExecutionError,
9    ExecutionResult, FetchInstructionResult, InstructionFetcher, OpaqueThreadedExecutionResult,
10    RegisterFile, Rs1Rs2OperandValues, Rs1Rs2Operands, ThreadedExecutableInstruction,
11    ThreadedExecutionResult,
12};
13use ab_riscv_macros::instruction_execution;
14use ab_riscv_primitives::prelude::*;
15
16#[instruction_execution]
17const impl<Reg, Hart> ExecutableInstructionOperands for Rv64ZkndZkneSharedInstruction<Hart>
18where
19    Reg: Register<Type = u64>,
20    Hart: HartConfig<Reg = Reg>,
21{
22}
23
24#[instruction_execution]
25const impl<Reg, Hart, Env> ExecutableInstructionCsr<Env> for Rv64ZkndZkneSharedInstruction<Hart>
26where
27    Reg: Register<Type = u64>,
28    Hart: HartConfig<Reg = Reg>,
29{
30}
31
32#[instruction_execution]
33const impl<Reg, Hart, Regs, Env, Memory, PC> ExecutableInstruction<Regs, Env, Memory, PC>
34    for Rv64ZkndZkneSharedInstruction<Hart>
35where
36    Reg: [const] Register<Type = u64>,
37    Hart: HartConfig<Reg = Reg>,
38    Regs: [const] RegisterFile<Reg>,
39{
40    #[inline(always)]
41    #[cfg_attr(feature = "no-panic", no_panic_const::no_panic(const))]
42    fn execute(
43        self,
44        Rs1Rs2OperandValues {
45            rs1_value,
46            rs2_value,
47        }: Rs1Rs2OperandValues<Reg::Type>,
48        _regs: &mut Regs,
49        _env: &mut Env,
50        _memory: &mut Memory,
51        _program_counter: &PC,
52    ) -> ExecutionResult<Reg> {
53        match self {
54            Self::Aes64Ks1i { rd, rs1: _, rnum } => {
55                let v1 = rs1_value;
56                ExecutionResult::Continue {
57                    rd,
58                    value: rv64_zknd_helpers::aes64ks1i(v1, rnum),
59                }
60            }
61            Self::Aes64Ks2 { rd, rs1: _, rs2: _ } => {
62                let v1 = rs1_value;
63                let v2 = rs2_value;
64                ExecutionResult::Continue {
65                    rd,
66                    value: rv64_zknd_helpers::aes64ks2(v1, v2),
67                }
68            }
69        }
70    }
71}
72
73#[instruction_execution]
74const impl<Reg, Hart> ExecutableInstructionOperands for Rv64ZkndInstruction<Hart>
75where
76    Reg: Register<Type = u64>,
77    Hart: HartConfig<Reg = Reg>,
78{
79}
80
81#[instruction_execution]
82const impl<Reg, Hart, Env> ExecutableInstructionCsr<Env> for Rv64ZkndInstruction<Hart>
83where
84    Reg: Register<Type = u64>,
85    Hart: HartConfig<Reg = Reg>,
86{
87}
88
89#[instruction_execution]
90const impl<Reg, Hart, Regs, Env, Memory, PC> ExecutableInstruction<Regs, Env, Memory, PC>
91    for Rv64ZkndInstruction<Hart>
92where
93    Reg: [const] Register<Type = u64>,
94    Hart: HartConfig<Reg = Reg>,
95    Regs: [const] RegisterFile<Reg>,
96{
97    #[inline(always)]
98    #[cfg_attr(feature = "no-panic", no_panic_const::no_panic(const))]
99    fn execute(
100        self,
101        Rs1Rs2OperandValues {
102            rs1_value,
103            rs2_value,
104        }: Rs1Rs2OperandValues<Reg::Type>,
105        _regs: &mut Regs,
106        _env: &mut Env,
107        _memory: &mut Memory,
108        _program_counter: &PC,
109    ) -> ExecutionResult<Reg> {
110        match self {
111            Self::Aes64Ds { rd, rs1: _, rs2: _ } => {
112                let v1 = rs1_value;
113                let v2 = rs2_value;
114                ExecutionResult::Continue {
115                    rd,
116                    value: rv64_zknd_helpers::aes64ds(v1, v2),
117                }
118            }
119            Self::Aes64Dsm { rd, rs1: _, rs2: _ } => {
120                let v1 = rs1_value;
121                let v2 = rs2_value;
122                ExecutionResult::Continue {
123                    rd,
124                    value: rv64_zknd_helpers::aes64dsm(v1, v2),
125                }
126            }
127            Self::Aes64Im { rd, rs1: _ } => {
128                let v1 = rs1_value;
129                ExecutionResult::Continue {
130                    rd,
131                    value: rv64_zknd_helpers::aes64im(v1),
132                }
133            }
134        }
135    }
136}
ab_riscv_interpreter/rv64/zk/zkn/zknd.rs

ab_riscv_interpreter/rv64/zk/zkn/
zknd.rs
