ab_riscv_interpreter/rv64/zk/zkn/
zknd.rs

1//! RV64 Zknd extension
2
3pub mod rv64_zknd_helpers;
4#[cfg(test)]
5mod tests;
6
7use crate::{
8    ExecutableInstruction, ExecutableInstructionCsr, ExecutableInstructionOperands, ExecutionError,
9    ExecutionResult, FetchInstructionResult, InstructionFetcher, OpaqueThreadedExecutionResult,
10    RegisterFile, Rs1Rs2OperandValues, Rs1Rs2Operands, ThreadedExecutableInstruction,
11    ThreadedExecutionResult,
12};
13use ab_riscv_macros::instruction_execution;
14use ab_riscv_primitives::prelude::*;
15
16#[instruction_execution]
17const impl<Reg> ExecutableInstructionOperands for Rv64ZkndInstruction<Reg> where
18    Reg: Register<Type = u64>
19{
20}
21
22#[instruction_execution]
23const impl<Reg, Env> ExecutableInstructionCsr<Env> for Rv64ZkndInstruction<Reg> where
24    Reg: Register<Type = u64>
25{
26}
27
28#[instruction_execution]
29const impl<Reg, Regs, Env, Memory, PC> ExecutableInstruction<Regs, Env, Memory, PC>
30    for Rv64ZkndInstruction<Reg>
31where
32    Reg: [const] Register<Type = u64>,
33    Regs: [const] RegisterFile<Reg>,
34{
35    #[inline(always)]
36    #[cfg_attr(feature = "no-panic", no_panic_const::no_panic(const))]
37    fn execute(
38        self,
39        Rs1Rs2OperandValues {
40            rs1_value,
41            rs2_value,
42        }: Rs1Rs2OperandValues<<Self::Reg as Register>::Type>,
43        _regs: &mut Regs,
44        _env: &mut Env,
45        _memory: &mut Memory,
46        _program_counter: &mut PC,
47    ) -> ExecutionResult<Self::Reg> {
48        match self {
49            Self::Aes64Ds { rd, rs1: _, rs2: _ } => {
50                let v1 = rs1_value;
51                let v2 = rs2_value;
52                ExecutionResult::Continue {
53                    rd,
54                    value: rv64_zknd_helpers::aes64ds(v1, v2),
55                }
56            }
57            Self::Aes64Dsm { rd, rs1: _, rs2: _ } => {
58                let v1 = rs1_value;
59                let v2 = rs2_value;
60                ExecutionResult::Continue {
61                    rd,
62                    value: rv64_zknd_helpers::aes64dsm(v1, v2),
63                }
64            }
65            Self::Aes64Im { rd, rs1: _ } => {
66                let v1 = rs1_value;
67                ExecutionResult::Continue {
68                    rd,
69                    value: rv64_zknd_helpers::aes64im(v1),
70                }
71            }
72            Self::Aes64Ks1i { rd, rs1: _, rnum } => {
73                let v1 = rs1_value;
74                ExecutionResult::Continue {
75                    rd,
76                    value: rv64_zknd_helpers::aes64ks1i(v1, rnum),
77                }
78            }
79            Self::Aes64Ks2 { rd, rs1: _, rs2: _ } => {
80                let v1 = rs1_value;
81                let v2 = rs2_value;
82                ExecutionResult::Continue {
83                    rd,
84                    value: rv64_zknd_helpers::aes64ks2(v1, v2),
85                }
86            }
87        }
88    }
89}
ab_riscv_interpreter/rv64/zk/zkn/zknd.rs

ab_riscv_interpreter/rv64/zk/zkn/
zknd.rs
