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ab_riscv_interpreter/rv64/
b.rs

1//! RV64 B extension
2
3pub mod zba;
4pub mod zbb;
5pub mod zbc;
6pub mod zbs;
7
8use crate::rv64::b::zbb::rv64_zbb_helpers;
9use crate::{
10    ExecutableInstruction, ExecutableInstructionCsr, ExecutableInstructionOperands, ExecutionError,
11    ExecutionResult, FetchInstructionResult, InstructionFetcher, OpaqueThreadedExecutionResult,
12    RegisterFile, Rs1Rs2OperandValues, Rs1Rs2Operands, ThreadedExecutableInstruction,
13    ThreadedExecutionResult,
14};
15use ab_riscv_macros::instruction_execution;
16use ab_riscv_primitives::prelude::*;
17
18#[instruction_execution]
19const impl<Reg, Hart> ExecutableInstructionOperands for Rv64BInstruction<Hart>
20where
21    Reg: Register<Type = u64>,
22    Hart: HartConfig<Reg = Reg>,
23{
24}
25
26#[instruction_execution]
27const impl<Reg, Hart, Env> ExecutableInstructionCsr<Env> for Rv64BInstruction<Hart>
28where
29    Reg: Register<Type = u64>,
30    Hart: HartConfig<Reg = Reg>,
31{
32}
33
34#[instruction_execution]
35const impl<Reg, Hart, Regs, Env, Memory, PC> ExecutableInstruction<Regs, Env, Memory, PC>
36    for Rv64BInstruction<Hart>
37where
38    Reg: [const] Register<Type = u64>,
39    Hart: HartConfig<Reg = Reg>,
40{
41    #[inline(always)]
42    #[cfg_attr(feature = "no-panic", no_panic_const::no_panic(const))]
43    fn execute(
44        self,
45        Rs1Rs2OperandValues {
46            rs1_value,
47            rs2_value,
48        }: Rs1Rs2OperandValues<Reg::Type>,
49        _regs: &mut Regs,
50        _env: &mut Env,
51        _memory: &mut Memory,
52        _program_counter: &PC,
53    ) -> ExecutionResult<Reg> {
54        ExecutionResult::ContinueNoWrite
55    }
56}