ab_riscv_interpreter/rv32/zk/
zbkx.rs1pub mod rv32_zbkx_helpers;
4#[cfg(test)]
5mod tests;
6
7use crate::{
8 ExecutableInstruction, ExecutableInstructionCsr, ExecutableInstructionOperands, ExecutionError,
9 ExecutionResult, FetchInstructionResult, InstructionFetcher, OpaqueThreadedExecutionResult,
10 RegisterFile, Rs1Rs2OperandValues, Rs1Rs2Operands, ThreadedExecutableInstruction,
11 ThreadedExecutionResult,
12};
13use ab_riscv_macros::instruction_execution;
14use ab_riscv_primitives::prelude::*;
15
16#[instruction_execution]
17const impl<Reg, Hart> ExecutableInstructionOperands for Rv32ZbkxInstruction<Hart>
18where
19 Reg: Register<Type = u32>,
20 Hart: HartConfig<Reg = Reg>,
21{
22}
23
24#[instruction_execution]
25const impl<Reg, Hart, Env> ExecutableInstructionCsr<Env> for Rv32ZbkxInstruction<Hart>
26where
27 Reg: Register<Type = u32>,
28 Hart: HartConfig<Reg = Reg>,
29{
30}
31
32#[instruction_execution]
33const impl<Reg, Hart, Regs, Env, Memory, PC> ExecutableInstruction<Regs, Env, Memory, PC>
34 for Rv32ZbkxInstruction<Hart>
35where
36 Reg: [const] Register<Type = u32>,
37 Hart: HartConfig<Reg = Reg>,
38 Regs: [const] RegisterFile<Reg>,
39{
40 #[inline(always)]
41 #[cfg_attr(feature = "no-panic", no_panic_const::no_panic(const))]
42 fn execute(
43 self,
44 Rs1Rs2OperandValues {
45 rs1_value,
46 rs2_value,
47 }: Rs1Rs2OperandValues<Reg::Type>,
48 _regs: &mut Regs,
49 _env: &mut Env,
50 _memory: &mut Memory,
51 _program_counter: &PC,
52 ) -> ExecutionResult<Reg> {
53 match self {
54 Self::Xperm4 { rd, rs1: _, rs2: _ } => ExecutionResult::Continue {
55 rd,
56 value: rv32_zbkx_helpers::xperm4(rs1_value, rs2_value),
57 },
58 Self::Xperm8 { rd, rs1: _, rs2: _ } => ExecutionResult::Continue {
59 rd,
60 value: rv32_zbkx_helpers::xperm8(rs1_value, rs2_value),
61 },
62 }
63 }
64}