ab_riscv_interpreter/rv32/zk/
zbkc.rs1use crate::rv32::b::zbc::rv32_zbc_helpers;
4use crate::{
5 ExecutableInstruction, ExecutableInstructionCsr, ExecutableInstructionOperands, ExecutionError,
6 ExecutionResult, FetchInstructionResult, InstructionFetcher, OpaqueThreadedExecutionResult,
7 RegisterFile, Rs1Rs2OperandValues, Rs1Rs2Operands, ThreadedExecutableInstruction,
8 ThreadedExecutionResult,
9};
10use ab_riscv_macros::instruction_execution;
11use ab_riscv_primitives::prelude::*;
12
13#[instruction_execution]
14const impl<Reg, Hart> ExecutableInstructionOperands for Rv32ZbkcInstruction<Hart>
15where
16 Reg: Register<Type = u32>,
17 Hart: HartConfig<Reg = Reg>,
18{
19}
20
21#[instruction_execution]
22const impl<Reg, Hart, Env> ExecutableInstructionCsr<Env> for Rv32ZbkcInstruction<Hart>
23where
24 Reg: Register<Type = u32>,
25 Hart: HartConfig<Reg = Reg>,
26{
27}
28
29#[instruction_execution]
30const impl<Reg, Hart, Regs, Env, Memory, PC> ExecutableInstruction<Regs, Env, Memory, PC>
31 for Rv32ZbkcInstruction<Hart>
32where
33 Reg: [const] Register<Type = u32>,
34 Hart: HartConfig<Reg = Reg>,
35{
36 #[inline(always)]
37 #[cfg_attr(feature = "no-panic", no_panic_const::no_panic(const))]
38 fn execute(
39 self,
40 Rs1Rs2OperandValues {
41 rs1_value,
42 rs2_value,
43 }: Rs1Rs2OperandValues<Reg::Type>,
44 _regs: &mut Regs,
45 _env: &mut Env,
46 _memory: &mut Memory,
47 _program_counter: &PC,
48 ) -> ExecutionResult<Reg> {
49 match self {
50 Self::Clmul { rd, rs1: _, rs2: _ } => {
51 let a = rs1_value;
52 let b = rs2_value;
53
54 ExecutionResult::Continue {
55 rd,
56 value: rv32_zbc_helpers::clmul(a, b),
57 }
58 }
59 Self::Clmulh { rd, rs1: _, rs2: _ } => {
60 let a = rs1_value;
61 let b = rs2_value;
62
63 ExecutionResult::Continue {
64 rd,
65 value: rv32_zbc_helpers::clmulh(a, b),
66 }
67 }
68 }
69 }
70}