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ab_riscv_interpreter/rv32/zk/
zbkc.rs

1//! RV32 Zbkc extension (subset of Zbc extension)
2
3use crate::rv32::b::zbc::rv32_zbc_helpers;
4use crate::{
5    ExecutableInstruction, ExecutableInstructionCsr, ExecutableInstructionOperands, ExecutionError,
6    ExecutionResult, FetchInstructionResult, InstructionFetcher, OpaqueThreadedExecutionResult,
7    RegisterFile, Rs1Rs2OperandValues, Rs1Rs2Operands, ThreadedExecutableInstruction,
8    ThreadedExecutionResult,
9};
10use ab_riscv_macros::instruction_execution;
11use ab_riscv_primitives::prelude::*;
12
13#[instruction_execution]
14const impl<Reg> ExecutableInstructionOperands for Rv32ZbkcInstruction<Reg> where
15    Reg: Register<Type = u32>
16{
17}
18
19#[instruction_execution]
20const impl<Reg, Env> ExecutableInstructionCsr<Env> for Rv32ZbkcInstruction<Reg> where
21    Reg: Register<Type = u32>
22{
23}
24
25#[instruction_execution]
26const impl<Reg, Regs, Env, Memory, PC> ExecutableInstruction<Regs, Env, Memory, PC>
27    for Rv32ZbkcInstruction<Reg>
28where
29    Reg: [const] Register<Type = u32>,
30{
31    #[inline(always)]
32    #[cfg_attr(feature = "no-panic", no_panic_const::no_panic(const))]
33    fn execute(
34        self,
35        Rs1Rs2OperandValues {
36            rs1_value,
37            rs2_value,
38        }: Rs1Rs2OperandValues<<Self::Reg as Register>::Type>,
39        _regs: &mut Regs,
40        _env: &mut Env,
41        _memory: &mut Memory,
42        _program_counter: &mut PC,
43    ) -> ExecutionResult<Self::Reg> {
44        ExecutionResult::ContinueNoWrite
45    }
46}