ab_riscv_interpreter/rv32/b/
zbc.rs

1//! RV32 Zbc extension
2
3pub mod rv32_zbc_helpers;
4#[cfg(test)]
5mod tests;
6
7use crate::{ExecutableInstruction, ExecutionError, RegisterFile};
8use ab_riscv_macros::instruction_execution;
9use ab_riscv_primitives::prelude::*;
10use core::ops::ControlFlow;
11
12#[instruction_execution]
13impl<Reg, Regs, ExtState, Memory, PC, InstructionHandler, CustomError>
14    ExecutableInstruction<Regs, ExtState, Memory, PC, InstructionHandler, CustomError>
15    for Rv32ZbcInstruction<Reg>
16where
17    Reg: Register<Type = u32>,
18    Regs: RegisterFile<Reg>,
19{
20    #[inline(always)]
21    fn execute(
22        self,
23        regs: &mut Regs,
24        _ext_state: &mut ExtState,
25        _memory: &mut Memory,
26        _program_counter: &mut PC,
27        _system_instruction_handler: &mut InstructionHandler,
28    ) -> Result<ControlFlow<()>, ExecutionError<Reg::Type, CustomError>> {
29        match self {
30            Self::Clmul { rd, rs1, rs2 } => {
31                let a = regs.read(rs1);
32                let b = regs.read(rs2);
33
34                regs.write(rd, rv32_zbc_helpers::clmul(a, b));
35            }
36            Self::Clmulh { rd, rs1, rs2 } => {
37                let a = regs.read(rs1);
38                let b = regs.read(rs2);
39
40                regs.write(rd, rv32_zbc_helpers::clmulh(a, b));
41            }
42            Self::Clmulr { rd, rs1, rs2 } => {
43                let a = regs.read(rs1);
44                let b = regs.read(rs2);
45
46                regs.write(rd, rv32_zbc_helpers::clmulr(a, b));
47            }
48        }
49
50        Ok(ControlFlow::Continue(()))
51    }
52}
ab_riscv_interpreter/rv32/b/zbc.rs

ab_riscv_interpreter/rv32/b/
zbc.rs
