ab_riscv_interpreter/rv32/b/
zba.rs

1//! RV32 Zba extension
2
3#[cfg(test)]
4mod tests;
5
6use crate::{ExecutableInstruction, ExecutionError, InterpreterState};
7use ab_riscv_macros::instruction_execution;
8use ab_riscv_primitives::instructions::rv32::b::zba::Rv32ZbaInstruction;
9use ab_riscv_primitives::registers::general_purpose::Register;
10use core::ops::ControlFlow;
11
12#[instruction_execution]
13impl<Reg, ExtState, Memory, PC, InstructionHandler, CustomError>
14    ExecutableInstruction<
15        InterpreterState<Reg, ExtState, Memory, PC, InstructionHandler, CustomError>,
16        CustomError,
17    > for Rv32ZbaInstruction<Reg>
18where
19    Reg: Register<Type = u32>,
20    [(); Reg::N]:,
21{
22    #[inline(always)]
23    fn execute(
24        self,
25        state: &mut InterpreterState<Reg, ExtState, Memory, PC, InstructionHandler, CustomError>,
26    ) -> Result<ControlFlow<()>, ExecutionError<Reg::Type, CustomError>> {
27        match self {
28            Self::Sh1add { rd, rs1, rs2 } => {
29                let value = (state.regs.read(rs1) << 1).wrapping_add(state.regs.read(rs2));
30                state.regs.write(rd, value);
31            }
32            Self::Sh2add { rd, rs1, rs2 } => {
33                let value = (state.regs.read(rs1) << 2).wrapping_add(state.regs.read(rs2));
34                state.regs.write(rd, value);
35            }
36            Self::Sh3add { rd, rs1, rs2 } => {
37                let value = (state.regs.read(rs1) << 3).wrapping_add(state.regs.read(rs2));
38                state.regs.write(rd, value);
39            }
40        }
41
42        Ok(ControlFlow::Continue(()))
43    }
44}
ab_riscv_interpreter/rv32/b/zba.rs

ab_riscv_interpreter/rv32/b/
zba.rs
