ab_riscv_interpreter/rv32/b/
zba.rs1#[cfg(test)]
4mod tests;
5
6use crate::{
7 ExecutableInstruction, ExecutableInstructionCsr, ExecutableInstructionOperands, ExecutionError,
8 RegisterFile, Rs1Rs2OperandValues, Rs1Rs2Operands,
9};
10use ab_riscv_macros::instruction_execution;
11use ab_riscv_primitives::prelude::*;
12use core::ops::ControlFlow;
13
14#[instruction_execution]
15impl<Reg> ExecutableInstructionOperands for Rv32ZbaInstruction<Reg> where Reg: Register<Type = u32> {}
16
17#[instruction_execution]
18impl<Reg, ExtState, CustomError> ExecutableInstructionCsr<ExtState, CustomError>
19 for Rv32ZbaInstruction<Reg>
20where
21 Reg: Register<Type = u32>,
22{
23}
24
25#[instruction_execution]
26impl<Reg, Regs, ExtState, Memory, PC, InstructionHandler, CustomError>
27 ExecutableInstruction<Regs, ExtState, Memory, PC, InstructionHandler, CustomError>
28 for Rv32ZbaInstruction<Reg>
29where
30 Reg: Register<Type = u32>,
31 Regs: RegisterFile<Reg>,
32{
33 #[inline(always)]
34 fn execute(
35 self,
36 Rs1Rs2OperandValues {
37 rs1_value,
38 rs2_value,
39 }: Rs1Rs2OperandValues<<Self::Reg as Register>::Type>,
40 _regs: &mut Regs,
41 _ext_state: &mut ExtState,
42 _memory: &mut Memory,
43 _program_counter: &mut PC,
44 _system_instruction_handler: &mut InstructionHandler,
45 ) -> Result<
46 ControlFlow<(), (Self::Reg, <Self::Reg as Register>::Type)>,
47 ExecutionError<Reg::Type, CustomError>,
48 > {
49 match self {
50 Self::Sh1add { rd, rs1: _, rs2: _ } => {
51 let value = (rs1_value << 1).wrapping_add(rs2_value);
52 Ok(ControlFlow::Continue((rd, value)))
53 }
54 Self::Sh2add { rd, rs1: _, rs2: _ } => {
55 let value = (rs1_value << 2).wrapping_add(rs2_value);
56 Ok(ControlFlow::Continue((rd, value)))
57 }
58 Self::Sh3add { rd, rs1: _, rs2: _ } => {
59 let value = (rs1_value << 3).wrapping_add(rs2_value);
60 Ok(ControlFlow::Continue((rd, value)))
61 }
62 }
63 }
64}